Memory (computer)

Memory (computer)
ElooKoN · CC BY-SA 4.0 · source
Name	Memory (computer)
Type	Hardware component
Invented	1940s–1970s
Developers	John von Neumann, Robert Noyce, Gordon Moore, Jay Forrester
Capacity	Varies
Speed	Varies

Memory (computer) Computer memory denotes electronic components and physical media that store binary information for use by central processing units, graphics processing units, digital signal processors, FPGAs, and other processing elements. Memory enables execution of stored-program architectures by holding instructions, data, and state across volatile and non-volatile technologies. It intersects with innovations from institutions and figures such as Massachusetts Institute of Technology, Bell Labs, Intel Corporation, IBM, and researchers including Maurice Wilkes, Konrad Zuse, and Claude Shannon.

Overview

Memory systems provide addressable storage accessible via buses and interconnects like PCI, USB, HyperTransport, and NVMe. Primary memory (volatile) and secondary memory (non-volatile) form a hierarchy exploited by operating systems from Unix and Microsoft Windows to Linux distributions and real-time platforms such as VxWorks. Memory design balances capacity, latency, bandwidth, and persistence considerations driven by demands from applications in supercomputing, embedded devices, Datacenter infrastructure, and consumer electronics from firms like Apple Inc. and Samsung Electronics.

Types

Memory varieties include volatile semiconductor memories such as DRAM and SRAM, and non-volatile memories such as ROM, Flash memory, Magnetic core memory, MRAM, PCM, FeRAM, and emerging technologies pursued by Micron Technology, SK Hynix, and Western Digital. Secondary and tertiary storage technologies encompass HDD, SSD, optical media from Sony Corporation formats, and tape systems used by LTO alliances. Cache memory tiers (L1, L2, L3) implemented by ARM Holdings, AMD, and Intel Corporation bridge processor core registers and main memory. Specialized memories include CAM, VRAM, and HSAs-targeted persistent stores for accelerators.

Architecture and Organization

Memory architecture defines addressing modes, bus protocols, and hierarchies that include registers, multiple cache levels, main memory, and long-term storage. Designs follow models such as the Von Neumann architecture and Harvard architecture, and use physical constructs like memory-mapped I/O and paged virtual memory from theory implemented in processors by companies such as Intel Corporation and ARM Holdings. Organization choices—interleaving, banked memory, error-correcting code (ECC), and channel topologies—affect throughput in systems from Cray Research supercomputers to mobile systems by Qualcomm. Memory controllers on motherboards and SoCs coordinate transactions with standards set by organizations like the JEDEC committee.

Performance and Metrics

Key metrics include latency (access time), bandwidth (transfer rate), throughput, and capacity per cost. DRAM timings, measured in cycles and nanoseconds, determine effective latency for workloads in Hadoop clusters, TensorFlow training, and gaming titles shipped by Electronic Arts. Cache hit/miss rates, prefetching effectiveness, and memory contention shape performance in multi-core platforms from NVIDIA and AMD. Benchmarks from SPEC and workload analyses from cloud providers such as Amazon Web Services and Google Cloud Platform quantify memory behavior at scale. Power per bit and thermal constraints are critical in designs for Intel Xeon servers and mobile SoCs in Apple A-series chips.

Management and Allocation

Operating systems implement allocation strategies including paging, segmentation, slab allocators, and garbage collection used by runtimes such as JVM, .NET Framework, and language ecosystems like Python and JavaScript. Virtual memory enables isolation, swapping, and copy-on-write semantics employed by kernels from Linux kernel communities and vendors like Red Hat. Memory allocators (malloc, free) and profiling tools from Valgrind and Perf guide tuning in large codebases at Google and Facebook. Container orchestration platforms like Kubernetes and virtualization stacks like VMware manage memory quotas, ballooning, and NUMA topology across clusters.

Security and Reliability

Security concerns include buffer overflows exploited in incidents involving actors tracked by CERT and mitigations such as Address Space Layout Randomization (ASLR) and Data Execution Prevention (DEP) implemented in Windows and macOS. Hardware vulnerabilities like Rowhammer and speculative-execution flaws disclosed by collaborations among researchers at Google Project Zero and academics prompted mitigations in microarchitectures from Intel and AMD. Reliability employs ECC, parity, wear leveling in flash controllers by Samsung Electronics, and redundancy schemes like RAID standardized by organizations including SNIA. Cryptographic key storage leverages secure enclaves such as Intel SGX and ARM TrustZone.

History and Evolution

Early electronic memories evolved from Williams tube CRT storage and Mercury delay line to magnetic core memory breakthroughs led by pioneers at MIT and companies like IBM; these advances enabled machines such as the ENIAC and EDSAC. The invention of semiconductor memories by researchers at Fairchild Semiconductor and patents by figures associated with Texas Instruments and Intel Corporation ushered in SRAM and DRAM eras. Integration scaling followed Moore's law trends articulated by Gordon Moore, while standards development by JEDEC and ecosystem shifts toward flash and persistent memory were driven by vendors including Micron Technology and SanDisk. Recent decades saw the rise of non-volatile memory research at laboratories like IMEC and corporate labs at HP Labs, and architectural shifts for heterogeneous computing in projects from OpenPOWER Foundation and consortia such as RISC-V.

Category:Computer memory