Moore's law

Moore's law
Name	Gordon E. Moore
Caption	Gordon E. Moore (co-founder of Intel Corporation)
Birth date	January 3, 1929
Death date	March 24, 2023
Nationality	American
Known for	Co-founding Intel Corporation, cofounder of Fairchild Semiconductor

Moore's law

Moore's law began as an empirical observation attributing exponential growth in transistor counts per integrated circuit to manufacturing innovations and market forces influencing Intel Corporation, Fairchild Semiconductor, Applied Materials, Texas Instruments, and Nvidia Corporation. The observation shaped roadmaps used by International Technology Roadmap for Semiconductors advocates, influenced planning at Samsung Electronics, TSMC, GlobalFoundries, Micron Technology, and guided capital allocation by investors in Venture capital firms and corporate R&D groups such as IBM and Hewlett-Packard. Over decades the observation was invoked alongside commitments from consortia like SEMI and standards bodies including IEEE to sustain scaling through design, lithography, and packaging advances.

History and origin

Gordon E. Moore articulated the original observation in 1965 while at Fairchild Semiconductor, noting a doubling trend that influenced decision-making at Intel Corporation after he co-founded it with Robert Noyce. Early adopters included engineers from Bell Labs and executives from Motorola who integrated the projection into capital planning for fabs developed by Texas Instruments and Advanced Micro Devices. The idea was popularized through presentations at industry forums such as meetings of IEEE and conferences where roadmaps shaped by SEMATECH and the International Technology Roadmap for Semiconductors were debated by participants from IBM Research, Hynix, Qualcomm, and national labs like Lawrence Berkeley National Laboratory. Key milestones in the narrative involved transitions enabled by photolithography vendors including ASML Holding and equipment suppliers such as Lam Research.

Technical definition and variations

Original articulation described an approximate doubling of transistor count per integrated circuit on a roughly two-year timescale, a metric operationalized by metrics used at Intel Corporation and by analysts at Gordon Moore's contemporaries. Variations include formulations referencing transistor density, device performance, cost per transistor, and system-level scaling used by International Technology Roadmap for Semiconductors, JEDEC, and corporate roadmaps at Samsung Electronics and TSMC. Implementation strategies that sustained the trend involved advances in photolithography from KrF excimer laser to EUV lithography tools by ASML Holding, process innovations such as FinFET and Gate-all-around transistors pioneered by teams at Intel Corporation and TSMC, interconnect innovations credited to research groups at IBM and Bell Labs, and packaging approaches advanced by Amkor Technology and Intel fabrication groups.

Economic and industry impact

Firms including Intel Corporation, Samsung Electronics, TSMC, and Nvidia Corporation aligned R&D spending, capital expenditures for fabs, and merger strategies around expectations of scaled performance and reduced cost-per-transistor. Financial markets, analysts at houses like Goldman Sachs and Morgan Stanley, and policy bodies in regions including Silicon Valley, Taiwan Semiconductor Manufacturing Company's host economy, and industrial policy groups in South Korea responded to forecasts shaped by the observation. Industry consortia such as SEMATECH and standards organizations like IEEE coordinated investments to mitigate risk, while governments through agencies like DARPA and ministries in Japan and South Korea offered incentives reflecting strategic priorities tied to semiconductor leadership.

Physical and technological limits

As feature sizes approached atomic scales the trajectory encountered limits associated with quantum effects, heat dissipation issues addressed in work at MIT, Stanford University, and University of California, Berkeley, and lithographic resolution challenges solved incrementally by ASML Holding's development of extreme ultraviolet tools. Researchers at IBM, Intel Corporation, TSMC, and university labs investigated alternatives including novel channel materials studied at Bell Labs and device concepts such as spintronics and quantum computing prototypes pursued at Google, Microsoft Research, and IBM Research. Materials suppliers like Applied Materials and Tokyo Electron adapted processes for new dielectrics and metal gates, while packaging innovators including Intel and Amkor Technology mitigated interconnect limits using 3D stacking.

Responses and alternatives

Industry responses included multi-die integration (chiplet architectures promoted by AMD and Intel), specialized accelerators from Nvidia Corporation and Google's Tensor Processing Unit program, and a shift to heterogeneous computing models championed by ARM Holdings and research at University of Cambridge. Economic strategies such as platform specialization by Apple Inc. and manufacturing diversification exemplified by TSMC and GlobalFoundries reflected adaptation. Research pursued alternatives like photonic computing experiments at MIT and Caltech, and cryogenic or neuromorphic approaches developed within DARPA programs and academic groups at ETH Zurich.

Cultural and societal influence

The observation became a cultural shorthand in Silicon Valley narratives, referenced by entrepreneurs at Intel Corporation spin-offs, venture-backed firms in Silicon Valley, and authors chronicling innovation in works associated with Wired (magazine), The Economist, and books by commentators on technology industries. It shaped expectations in consumer electronics from companies such as Apple Inc. and Samsung Electronics, influenced educational programs at institutions including MIT, Stanford University, and Carnegie Mellon University, and entered public policy debates involving national strategies in United States industrial policy and semiconductor initiatives in European Union and Japan. The motif persists in investor discourse, trade-show panels like CES and SEMICON exhibitions, and museum exhibits curated by institutions such as the Computer History Museum.

Category:Semiconductor industry