SRAM

SRAM
Name	SRAM
Caption	Static random-access memory chip
Type	Semiconductor memory
Invented	1960s
Inventors	Robert H. Dennard, John R. Pierce
Applications	Cache memory, embedded systems, networking

SRAM

Static random-access memory is a type of semiconductor memory that retains data bits in its memory as long as power is applied, using bistable latching circuitry rather than periodic refresh. It complements Dynamic random-access memory in computer architectures such as Von Neumann architecture and Harvard architecture designs, and is widely used in products by companies such as Intel Corporation, AMD, Micron Technology, Samsung Electronics, and Texas Instruments. SRAM is central to implementations of Central processing unit cache hierarchies, Field-programmable gate array block RAM, and networking buffers in equipment from Cisco Systems and Juniper Networks.

Introduction

SRAM emerged from early work in semiconductor devices and memory circuits undertaken at institutions including Massachusetts Institute of Technology, Bell Labs, and IBM Research. Early practical devices were enabled by advances in MOSFET fabrication at fabs like Fairchild Semiconductor and National Semiconductor. The technology matured alongside industry milestones such as the development of the Integrated circuit and the expansion of Semiconductor industry supply chains dominated by foundries such as TSMC and GlobalFoundries.

Design and Operation

SRAM cells typically use six-transistor (6T) configurations invented in contexts related to MOSFET and CMOS logic development; alternative topologies include 4T and 8T cells used in specialized designs. Read and write operations interact with peripheral circuits including precharge circuits, sense amplifiers, and row/column decoders implemented with logic types like CMOS inverter pairs and Transmission gate switches. Timing and control signals reference standards and protocols used in microprocessors from Intel Corporation and ARM Holdings, and interact with bus fabrics in systems such as those designed by NVIDIA and Qualcomm. Layout and transistor scaling considerations reflect process nodes at fabs like TSMC and Samsung Foundry, and are constrained by phenomena studied in Semiconductor device physics.

Types and Variants

SRAM families include on-chip CPU caches (L1, L2, L3) employed by architectures from x86 architecture vendors and ARM architecture licensees, as well as embedded SRAM (eSRAM) used in gaming consoles by companies such as Sony Interactive Entertainment and Microsoft Corporation. Variants include asynchronous SRAM used in legacy networking gear from Cisco Systems and synchronous SRAM interfacing with memory controllers in designs by Micron Technology. Specialized forms include multi-port SRAM used in Digital Signal Processor designs by Texas Instruments, zero-power SRAM marketed by startups collaborating with DARPA programs, and radiation-hardened SRAM developed for European Space Agency and NASA missions.

Performance Characteristics

SRAM performance metrics—access time, cycle time, power dissipation, and bit density—are evaluated in competition with DRAM products from Micron Technology and SK Hynix. Cache hierarchies in microprocessors by Intel Corporation and AMD optimize SRAM latency to improve instructions-per-cycle in workloads characterized by benchmarks from SPEC and deployments on servers by Amazon Web Services and Google LLC. Power-performance tradeoffs influence designs for mobile SoCs by Apple Inc. and Qualcomm, where leakage currents at advanced process nodes from TSMC drive techniques such as body-bias control and power gating used in products by Samsung Electronics.

Manufacturing and Packaging

SRAM manufacturing leverages foundry services provided by TSMC, GlobalFoundries, and Samsung Foundry, and requires process integration steps common to fabs servicing Intel Corporation and Micron Technology. Packaging options include stacked-die packages used by Advanced Micro Devices and flip-chip ball grid arrays deployed in network ASICs by Broadcom Inc.. Yield, defectivity, and wafer-level testing intersect with standards and equipment from Applied Materials, ASML, and KLA Corporation, and are influenced by lithography advances tied to EUV lithography programs.

Applications and Usage

SRAM is used extensively as CPU cache in processors from Intel Corporation, AMD, and ARM Holdings licensees; as on-chip scratchpad memory in SoCs designed by NVIDIA and Apple Inc.; and as packet buffers in routers and switches produced by Cisco Systems and Arista Networks. It supports real-time control systems in automotive electronic control units by Bosch and Continental AG, and is deployed in aerospace avionics by contractors such as Lockheed Martin and Northrop Grumman. Gaming consoles from Sony Interactive Entertainment and Microsoft Corporation integrate SRAM for fast frame-buffering and texture caching, while FPGA vendors like Xilinx and Altera (Intel) use SRAM-based block RAM.

Reliability and Failure Modes

SRAM reliability considerations include soft errors from ionizing radiation studied in programs by NASA and European Space Agency, and electromigration and self-heating phenomena addressed by suppliers such as Intel Corporation and TSMC. Error-correcting codes developed in standards work influenced by IEEE committees and academic researchers mitigate single-event upsets in spacecraft and high-availability servers used by Amazon Web Services and Google LLC. Aging mechanisms such as bias temperature instability and hot-carrier injection are analyzed in the context of device models from Silvaco and Synopsys and managed through design rules published by foundries like GlobalFoundries.

Category:Computer memory