field-programmable gate array

field-programmable gate array
Name	Field-Programmable Gate Array
Caption	A generic block diagram of an FPGA architecture.
Invented	1985
Inventor	Ross Freeman, Xilinx
First produced	1985
Commonly used in	Telecommunications, Digital signal processing, Aerospace, Consumer electronics

field-programmable gate array. A field-programmable gate array is a type of integrated circuit designed to be configured by a customer or a designer after manufacturing. This configurability allows the hardware to be adapted to specific computational tasks, making it distinct from fixed-function ASICs. FPGAs contain an array of programmable logic blocks and a hierarchy of reconfigurable interconnects that allow the blocks to be wired together, enabling the implementation of complex digital circuits.

Overview

The fundamental concept behind the technology is hardware reconfigurability, which provides a middle ground between the inflexibility of ASICs and the sequential nature of general-purpose processors. This allows for the creation of custom digital circuits that can be optimized for specific algorithms, such as those used in DSP or cryptographic acceleration. Major manufacturers in this sector include Xilinx (now part of AMD), Intel (through its acquisition of Altera), and Lattice Semiconductor. The ability to be reprogrammed in the field, even after deployment in a system, is a key advantage for prototyping and for applications requiring post-deployment updates.

Architecture

A typical architecture consists of three primary elements: configurable logic blocks (CLBs), programmable routing, and I/O blocks. The CLBs, which are the core functional units, typically contain look-up tables (LUTs) and flip-flops to implement combinatorial and sequential logic. The programmable routing fabric, composed of interconnect wires and programmable switches, creates the pathways between logic blocks. Surrounding the core array are I/O blocks that manage communication with external devices, supporting various voltage standards and protocols. Modern devices from companies like Xilinx and Intel also incorporate dedicated hard blocks for functions like memory (Block RAM), DSP slices, and high-speed serial transceivers for protocols like PCI Express.

Design and programming

Designing for these devices is primarily done using hardware description languages (HDLs) such as VHDL and Verilog. The design flow involves writing HDL code, followed by synthesis to map the design onto the available resources, placement and routing to define the physical layout, and finally generating a bitstream configuration file. This file is then loaded into the device, typically via a JTAG interface or from an external flash chip. Major software suites for this process include Vivado from Xilinx and Quartus Prime from Intel.

Applications

Their reconfigurable nature makes them invaluable across numerous industries. In telecom and networking, they are used in baseband processing and network switch routers. The Aerospace and defense sectors utilize them for radar processing and electronic warfare systems due to their performance and ability to resist obsolescence. In Consumer electronics, they enable rapid prototyping for companies like Microsoft and Sony and are found in digital televisions and set-top boxes. Furthermore, they are increasingly deployed in data centers for accelerating workloads like machine learning inference and database operations.

History and development

The technology was co-invented by Ross Freeman and Bernard Vonderschmitt, who founded Xilinx in 1984. The first commercially viable device, the Xilinx XC2064, was introduced in 1985. Early adoption was driven by the need for flexible glue logic and rapid prototyping in the electronics industry. A significant evolution was the introduction of SRAM-based configuration in the 1990s, which allowed for infinite re-programmability. The 2000s saw major acquisitions, such as Altera by Intel in 2015, consolidating the market. Continuous advancements have led to devices with millions of logic cells, integration of multi-core ARM processors in SoC FPGAs, and the use of advanced process nodes from partners like TSMC.

Comparison with other devices

When contrasted with ASICs, these devices offer lower non-recurring engineering costs and faster time-to-market but generally have higher per-unit cost, higher power consumption, and lower performance for a given function. Compared to microprocessors and GPUs, they provide true parallel execution of operations, offering deterministic latency and potential performance gains for specific, well-parallelized tasks, though they require specialized hardware design skills. For lower-complexity programmable logic, CPLDs are often used, but they lack the density and advanced features found in modern reconfigurable arrays.

Category:Integrated circuits Category:Digital electronics Category:Reconfigurable computing Category:Programmable logic devices