CPU (central processing unit)

CPU (central processing unit)
Name	CPU (central processing unit)
Introduced	1940s
Designer	Multiple
Manufacturer	Multiple
Clock speed	Varies
Cores	Varies
Lithography	Varies

CPU (central processing unit) The central processing unit is the primary electronic subsystem that interprets and executes instructions in digital computing devices; it coordinates tasks between memory, input/output controllers, and specialized accelerators. In modern computing ecosystems developed by Intel Corporation, Advanced Micro Devices, ARM Holdings, IBM and NVIDIA Corporation, CPUs serve as the control hub for software from Microsoft Corporation Windows and Apple Inc. macOS to distributions of Debian and Red Hat Enterprise Linux. Historical milestones milestone alongside projects such as the ENIAC, Manchester Baby, EDSAC and institutions like Bell Labs, Massachusetts Institute of Technology, and Stanford University shaped the processor’s evolution.

History

Early electronic CPUs emerged from wartime and postwar projects including the ENIAC effort at University of Pennsylvania and the stored-program concepts formalized by John von Neumann at Princeton University and Von Neumann architecture influenced designs in laboratories such as Manchester University with the Manchester Baby and commercial systems like the UNIVAC I produced by Remington Rand. The transistor revolution led by Bell Labs and commercialization via Fairchild Semiconductor and the founding of Intel Corporation by Robert Noyce and Gordon Moore enabled the microprocessor era with the Intel 4004. Competition between firms such as Motorola (with the 68000 series) and Advanced Micro Devices drove desktop and workstation CPU development used in products by Apple Computer and Commodore International. Architectural innovations credited to researchers at Stanford University, University of California, Berkeley, and companies like Sun Microsystems introduced concepts used in RISC and CISC debates; legislative and economic events such as the Dot-com bubble and alliances including OpenPOWER Foundation shaped industry trajectories.

Architecture and design

CPUs are organized around datapaths and control units implementing variants of the Von Neumann architecture or Harvard architecture; chip floorplanning by firms like TSMC and GlobalFoundries integrates logic blocks, cache hierarchies, and interconnect fabrics similar to those used in systems by Google and Amazon.com data centers. Microarchitectural features—pipelining, out-of-order execution, superscalar dispatch—trace to research at Princeton University and University of Illinois Urbana-Champaign and are deployed in commercial cores from Intel Skylake to ARM Cortex and IBM POWER designs. Memory subsystems incorporate multi-level caches (L1, L2, L3) following cache coherence protocols influenced by studies at Massachusetts Institute of Technology and implemented in server platforms like Dell EMC PowerEdge and Hewlett-Packard Enterprise systems. Power, thermal, and reliability engineering draw on standards and testing practices from organizations including IEEE and JEDEC Solid State Technology Association.

Instruction set and execution

Instruction sets produced by Intel Corporation (x86, x86-64), ARM Holdings (ARMv7, ARMv8), IBM (POWER ISA), and legacy families from Motorola define opcode semantics and calling conventions used by operating systems such as Microsoft Windows NT, Linux kernel, and FreeBSD. Compilers from projects like GNU Project gcc, LLVM Project clang, and toolchains by Microsoft interact with CPU features such as SIMD extensions (SSE, AVX), virtualization support (VT-x, AMD-V), and security mitigations motivated by vulnerabilities disclosed by researchers at Google Project Zero and universities including Carnegie Mellon University. Execution models include in-order and out-of-order pipelines, branch prediction mechanisms researched at Intel and AMD labs, and microcode facilities used in complex instruction decoding in processors from IBM and Oracle Corporation (Sun).

Performance and benchmarking

CPU performance is measured by metrics like instructions per cycle, clock frequency, throughput, and energy efficiency; benchmarks such as SPEC CPU, LINPACK, Dhrystone, and Geekbench evaluate integer, floating-point, and system-level workloads used by vendors including Hewlett-Packard and Lenovo. High-performance computing centers such as Oak Ridge National Laboratory, Lawrence Livermore National Laboratory, and projects like TOP500 and Exascale Computing Project drive multicore scaling and interconnect optimizations. Performance tuning employs profiling tools from Intel VTune, AMD uProf, and open-source utilities developed in communities around GitHub and influenced by programming models like OpenMP and MPI.

Manufacturing and fabrication

Modern CPUs are fabricated by foundries such as Taiwan Semiconductor Manufacturing Company, Samsung Electronics, and GlobalFoundries using photolithography technologies advanced by equipment suppliers like ASML Holding; node shrink trajectories (7 nm, 5 nm, 3 nm) reflect collaborative research involving IBM Research and IMEC. Packaging and testing processes incorporate flip-chip, multi-chip modules, and chiplet strategies exemplified by product roadmaps from AMD and integration efforts by Intel. Supply chains intersect with geopolitical actors including United States Department of Commerce export controls, trade relationships with People's Republic of China and policies influenced by World Trade Organization frameworks.

Applications and variants

CPU designs span microcontrollers in Arduino and Raspberry Pi ecosystems to server-grade processors in Amazon Web Services and Microsoft Azure clouds, workstation CPUs used by Autodesk and Adobe Inc., and embedded SoCs powering devices from Samsung Electronics and Qualcomm. Domain-specific variants include accelerated hybrids pairing CPUs with GPUs from NVIDIA Corporation and FPGAs from Xilinx (now part of Advanced Micro Devices), as well as specialized processors for cryptocurrency mining and machine learning workloads used in projects by OpenAI and research at University of Toronto. Form factors range from low-power designs for Boeing avionics and Tesla, Inc. automotive controllers to high-end multi-socket CPUs in supercomputers like those achieving rankings on the TOP500 list.

Category:Computer hardware