LLMpediaThe first transparent, open encyclopedia generated by LLMs

PowerPC 604

Generated by DeepSeek V3.2
Note: This article was automatically generated by a large language model (LLM) from purely parametric knowledge (no retrieval). It may contain inaccuracies or hallucinations. This encyclopedia is part of a research project currently under review.
Article Genealogy
Parent: PowerPC Hop 4
Expansion Funnel Raw 81 → Dedup 0 → NER 0 → Enqueued 0
1. Extracted81
2. After dedup0 (None)
3. After NER0 ()
4. Enqueued0 ()
PowerPC 604
NamePowerPC 604
DesignerIBM, Motorola, Apple Inc.
Bits32-bit
Introduced1995
DesignRISC
Transistors3.6 million
Process0.5 µm
Frequency100–180 MHz
FSB40–50 MHz
SocketCPGA
PredecessorPowerPC 603
SuccessorPowerPC 604e

PowerPC 604. The PowerPC 604 is a superscalar microprocessor developed by the AIM alliance of IBM, Motorola, and Apple Inc. Introduced in 1995, it was designed as a high-performance CPU for workstations and servers, succeeding the more power-efficient PowerPC 603. The processor featured significant architectural enhancements, including a deeper instruction pipeline and more execution units, to deliver substantially higher integer and floating-point performance for demanding applications in fields like computer-aided design and scientific computing.

Overview

The PowerPC 604 was announced in late 1994 and began shipping in systems throughout 1995, positioned against contemporary RISC competitors like the DEC Alpha 21064 and MIPS R4400. As a core component of the PowerPC 600 series, it was a pivotal product for the AIM alliance, aiming to capture market share in the technical and enterprise computing sectors from established players like Sun Microsystems and Silicon Graphics. Its launch was closely tied to new systems from IBM in its RS/6000 line and from Motorola in its computer group offerings, signaling a concerted push into high-performance computing.

Design and architecture

The 604's architecture was a major evolution from the PowerPC 603, implemented on a 0.5 µm CMOS process with 3.6 million transistors. It was a four-way superscalar design capable of dispatching and completing up to four instructions per clock cycle. The core contained six independent execution units: two integer units, a load/store unit, a floating-point unit, a branch processing unit, and a system register unit. This was supported by a sophisticated branch prediction mechanism and a non-blocking cache architecture, with separate 16 KB instruction cache and data cache units. The memory management unit supported both segment-based and page-based addressing, compatible with the PowerPC Reference Platform specification. Key to its performance was a seven-stage instruction pipeline and a tomasulo algorithm-inspired reservation station system for dynamic instruction scheduling and out-of-order execution.

Performance and reception

Upon release, the PowerPC 604 received positive reviews for its strong SPECint and SPECfp benchmark results, often outperforming the Intel Pentium Pro and rivaling higher-clocked Alpha processors in many integer tasks. Industry analysis from publications like Microprocessor Report highlighted its efficient design and competitive performance per watt. However, some critics noted that its floating-point unit, while improved, still lagged behind the best-in-class performance of the DEC Alpha in certain scientific workloads. The processor was generally praised for bringing server-class performance to more affordable workstation platforms, strengthening the position of the PowerPC architecture in markets dominated by SPARC and PA-RISC systems. Its success encouraged further development, leading directly to the enhanced PowerPC 604e.

Variants and derivatives

The original 604 was followed by a process-shrunk variant, the PowerPC 604e, which increased clock speeds and reduced power consumption. An even more advanced version, the PowerPC 604ev, was later developed, codenamed "Mach 5". Furthermore, the core design principles and instruction set architecture of the 604 heavily influenced subsequent PowerPC 7xx series processors, such as the PowerPC 750 (G3). While not a direct variant, the intellectual property and design experience from the 604 project were critical to IBM's development of the high-end POWER3 and POWER4 microprocessors for the AS/400 and RS/6000 lines, cementing its architectural legacy.

Usage in systems

The PowerPC 604 was utilized in several significant computer lines during the mid-1990s. IBM deployed it across various models of its RS/6000 family, including the Power Series workstations and the 43P "Chili" desktop systems. Motorola integrated the processor into its StarMax and VMEbus-based systems. Notably, it was not adopted by Apple Inc. for the Macintosh line, which favored the lower-power PowerPC 603e and later the PowerPC 750; Apple's high-performance needs were temporarily met by the PowerPC 601 and its successors. The 604 found additional niches in embedded systems, telecommunications equipment from companies like Cisco Systems, and in some real-time computing applications within the aerospace industry.

Category:PowerPC microprocessors Category:IBM microprocessors Category:Motorola microprocessors Category:1995 in computing