CMOS

CMOS
Name	Complementary metal–oxide–semiconductor
Caption	A modern integrated circuit utilizing CMOS technology.
Invented year	1963
Invented by	Frank Wanlass at Fairchild Semiconductor
First production	1968
Related technologies	NMOS logic, PMOS logic, BiCMOS, FinFET

CMOS. Complementary metal–oxide–semiconductor is a dominant technology for constructing integrated circuits, including microprocessors, microcontrollers, static RAM, and other digital logic circuits. Its invention by Frank Wanlass at Fairchild Semiconductor in 1963 provided a fundamental solution for creating low-power digital electronics. The technology's defining characteristic is its use of complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions, which has enabled the exponential growth of computing power described by Moore's law.

Overview

The core principle involves pairing MOSFETs of opposite polarities, where one transistor acts as a switch while its complement acts as a load. This configuration, fundamental to digital electronics, ensures that in a steady state, the path from the power supply to ground is effectively blocked, minimizing static power consumption. The technology's low power dissipation, high noise margin, and ability to be densely packed on a silicon wafer led to its rapid adoption over earlier technologies like NMOS logic and transistor–transistor logic. Its scalability has been the engine behind the advancement of the semiconductor industry, enabling everything from the Intel 4004 to modern system on a chip designs.

Technical operation

A basic CMOS inverter consists of one nMOS transistor and one pMOS transistor connected in series between the voltage source and ground. When the input is at a logic high voltage, the nMOS device conducts, pulling the output low, while the pMOS device is off. Conversely, a low input turns on the pMOS device and turns off the nMOS, pulling the output high. This push-pull action is the basis for more complex logic gates like NAND and NOR gates. Key performance metrics include propagation delay, which is influenced by parasitic capacitance and transistor channel length, and dynamic power consumption, which scales with switching activity and the square of the supply voltage (CV²f).

Manufacturing process

Fabrication occurs in highly specialized facilities known as fabs, such as those operated by TSMC, Samsung Electronics, and Intel. The process begins with a pure silicon wafer and uses photolithography to pattern the intricate layers of transistors and interconnects. Critical steps include ion implantation to create the p-type and n-type wells, chemical vapor deposition of the gate oxide (traditionally silicon dioxide), and etching to define features. Advanced nodes now employ techniques like extreme ultraviolet lithography and use new materials such as high-κ dielectrics and metal gates to overcome limitations like gate leakage.

Applications

The technology is ubiquitous in modern electronics. It forms the core of all mainstream central processing units from companies like AMD and Apple Inc., as well as graphics processing units from NVIDIA. It is essential in memory chips, including DRAM and flash memory controllers, and in analog circuits like data converters and image sensors used in devices from Sony and Canon Inc.. The low power consumption is critical for mobile devices such as smartphones and tablet computers, and it enables complex application-specific integrated circuits for automotive, aerospace, and Internet of Things systems.

Variants and scaling

As traditional planar MOSFET scaling approached physical limits, new architectures were developed. FinFET technology, pioneered by companies like IBM and now used by GlobalFoundries, introduced a three-dimensional transistor structure for better channel control. Further advancements include gate-all-around FETs and the exploration of new semiconductor materials like gallium nitride. Techniques such as silicon on insulator and fully depleted silicon on insulator reduce parasitic effects. The industry roadmap, historically guided by ITRS, continues to drive innovation in process nodes, moving from micrometer to single-nanometer scales.

Comparison with other technologies

Compared to its predecessor bipolar junction transistor technology, it offers significantly lower power consumption and higher integration density, though traditionally with lower transconductance. It largely supplanted NMOS logic in the 1980s due to superior power characteristics. While transistor–transistor logic offered faster edge rates in some applications, its higher power dissipation made it unsuitable for large-scale integration. For high-speed or high-power analog applications, technologies like gallium arsenide or silicon-germanium are sometimes preferred, and BiCMOS integrates bipolar and CMOS transistors on the same die to leverage the strengths of both.

Category:Digital electronics Category:Integrated circuits Category:Semiconductor devices Category:American inventions