Naples (microprocessor)

Naples (microprocessor)
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Name	Naples
Designer	Advanced Micro Devices
Launched	2017
Data width	64-bit
Socket	Socket SP3
Predecessor	AMD Opteron (Piledriver-based)
Successor	Rome

Naples (microprocessor). Naples is the codename for the first generation of AMD's Zen-based server and workstation processors, officially launched as the AMD Epyc 7000 series in 2017. It marked AMD's re-entry into the high-performance server market after a prolonged absence, challenging the dominance of Intel's Xeon processors. The architecture represented a significant leap in core count, memory bandwidth, and I/O capabilities over its predecessors.

Overview

The development of Naples was a cornerstone of Lisa Su's strategy to revitalize Advanced Micro Devices in competitive computing segments. It was formally unveiled at a launch event in Austin, Texas, signaling a direct challenge to Intel in the lucrative data center market. The processor family was designed to offer a compelling alternative in workloads ranging from cloud computing and virtualization to high-performance computing and enterprise databases. Its introduction was supported by partnerships with major OEMs like Dell EMC, Hewlett Packard Enterprise, and Lenovo.

Architecture

Naples is built on the foundational Zen microarchitecture, which introduced a simultaneous multithreading design, a new cache hierarchy, and improved instructions per cycle. Each Naples processor is a multi-chip module comprising four eight-core Zen dies, known as Core Complex Dies, interconnected via Infinity Fabric. This modular design allows for up to 32 physical cores and 64 threads per socket. The architecture features a unified memory access model across all cores with eight channels of DDR4 memory support, a significant increase over contemporary offerings from Intel. Extensive I/O is provided through 128 PCI Express lanes, enabling dense storage and accelerator configurations.

Specifications

The Naples processors were manufactured for Advanced Micro Devices by GlobalFoundries using a 14 nm FinFET process technology. The lineup spanned models with core counts from 8 to 32, with base clock frequencies ranging from 2.0 GHz to 3.2 GHz and thermal design power ratings from 120 to 180 watts. All models supported the full 128 lanes of PCI Express 3.0 and eight channels of DDR4 memory with ECC. Key instruction set extensions included AVX2, and the platform offered hardware-assisted virtualization via AMD-V and secure memory encryption through AMD Secure Memory Encryption.

Performance

Independent reviews and benchmarks, such as those from AnandTech and ServeTheHome, demonstrated that Naples offered highly competitive performance-per-dollar and performance-per-watt against contemporary Intel Xeon Scalable processors. It excelled in multi-threaded workloads like scientific computing, rendering, and video encoding, often matching or exceeding competing systems with higher core counts. Its massive I/O bandwidth proved advantageous for storage-intensive applications and workloads utilizing GPUs or FPGA accelerators. Performance in single-threaded tasks was generally competitive, closing a historical gap with Intel architectures.

Market positioning and competition

Naples was positioned as a disruptor in the server CPU market, directly targeting Intel's Xeon E5 and Xeon Scalable families. Its primary value propositions were a higher core count, superior memory and I/O bandwidth, and a competitive price point. This allowed Advanced Micro Devices to secure design wins with major cloud providers like Microsoft Azure and Tencent, as well as supercomputing projects. The competition intensified market dynamics, leading to more rapid innovation and core count increases from Intel. The platform's success laid the groundwork for its successor, Rome.

Variants

The Naples family was segmented into several series within the AMD Epyc 7000 branding to address different market segments. The Epyc 7601 was the flagship 32-core model, while the Epyc 7301 represented a lower-core-count entry point. Specific SKUs were optimized for either maximum performance (P-series) or balanced power efficiency (standard series). A limited number of single-socket optimized variants were also offered for cost-sensitive workstation and server applications. All variants maintained the platform's hallmark features of high memory bandwidth and extensive PCI Express connectivity. Category:AMD microprocessors Category:Server microprocessors Category:2017 introductions