Generated by DeepSeek V3.2| MPW | |
|---|---|
| Name | MPW |
| Classification | Integrated circuit prototyping |
| Related technologies | Multi-project wafer, Application-specific integrated circuit, Field-programmable gate array |
MPW. Multi-project wafer (MPW) services are a cornerstone of modern semiconductor research and development, enabling cost-effective prototyping of integrated circuit designs. This approach allows multiple, often unrelated, chip designs from different organizations to be fabricated together on a single silicon wafer, dramatically reducing the financial barrier for academia, startups, and large corporations to test new concepts. By sharing the immense costs of a mask set and a full wafer fabrication run, MPW services have become an indispensable tool for innovation in fields ranging from microprocessor design to MEMS and photonics.
The MPW model is fundamentally a shared foundry service, coordinated by organizations like MOSIS in the United States or Europractice in Europe. Instead of a single entity bearing the cost of an entire production mask set for a wafer, the service aggregates numerous smaller designs, each occupying a portion of the wafer, known as a reticle. This process is facilitated by sophisticated software that assembles the various GDSII layout files into a single composite design for manufacturing. The concept gained prominence alongside the growth of the very-large-scale integration industry and has been critical for the development of application-specific integrated circuits and system-on-a-chip technologies.
MPW runs are extensively used across the electronics ecosystem for prototyping and low-volume production. In academia, institutions like the University of California, Berkeley and the Massachusetts Institute of Technology utilize these services for graduate research and experimental chip designs. Industrial research and development teams at companies such as Intel, AMD, and Qualcomm employ MPW for validating new circuit architectures before committing to full-scale production. Furthermore, the model is vital for emerging fields, supporting the fabrication of specialized sensors, radio-frequency identification tags, biomedical implants, and prototypes for the Internet of Things.
A typical MPW service offers access to established CMOS process nodes from leading foundry partners like TSMC, GlobalFoundries, or Samsung Electronics. Available technologies can range from mature nodes like 180nm or 90nm to advanced nodes such as 28nm, 16nm, or even 7nm, depending on the program. The service defines a standardized process design kit that includes design rules, SPICE models, and standard cell libraries. Key specifications for participants include a maximum die area allocation, often called a "shuttle" slot, constraints on the number of metal layers used, and strict adherence to the foundry's design rule check and layout versus schematic verification protocols.
The manufacturing flow begins with the MPW service provider collecting and verifying design data from all participants. These individual designs are then merged using specialized software to create a single, composite reticle pattern. This combined mask set is used in photolithography steppers at the partner foundry to pattern the silicon wafer. The wafer undergoes the complete sequence of semiconductor device fabrication steps, including deposition, etching, and ion implantation. After fabrication, the wafer is diced, and the individual chips are packaged and returned to each design team for bench testing, characterization, and failure analysis.
The primary advantage of the MPW model is profound cost reduction, allowing access to multi-million-dollar fabrication lines for a fraction of the price. It significantly lowers the risk and capital required for innovation, fostering competition and technological advancement. However, the approach has inherent limitations. Participants sacrifice control over the fabrication schedule, as they must wait for the shuttle to fill and run on the foundry's timeline. There is also no flexibility in process parameters, and the prototype quantities are limited to dozens or hundreds of chips, which is insufficient for commercial volume production.
The MPW ecosystem is supported by a network of service providers, EDA tool vendors, and intellectual property core companies. Key commercial and governmental providers include MOSIS, Europractice, CMP in France, and VTT in Finland. The market demand for these services is closely tied to trends in artificial intelligence hardware, 5G communications, and automotive electronics. As the cost of mask sets for advanced nodes like 5nm can exceed tens of millions of dollars, the MPW model remains a critical enabler, ensuring that cutting-edge semiconductor manufacturing capabilities are accessible beyond just the largest corporations like Apple Inc. or Nvidia.
Category:Semiconductors Category:Integrated circuits Category:Electronic design