MOS Technology 6502

MOS Technology 6502. The MOS Technology 6502 is an 8-bit microprocessor that was introduced in 1975. Designed by a team led by Chuck Peddle and Bill Mensch, it became one of the most influential and widely used microprocessors of the 1970s and 1980s. Its low cost and simple architecture enabled the proliferation of affordable home computers and video game consoles, fundamentally shaping the personal computing industry.

History and development

The 6502 was conceived by former Motorola engineers, including Chuck Peddle, who had worked on the Motorola 6800. Seeking to create a dramatically cheaper alternative, the team left Motorola and joined MOS Technology, a subsidiary of Commodore International. The design philosophy emphasized simplicity and cost reduction, utilizing a smaller instruction set and fewer transistors than competitors like the Intel 8080. Its aggressive pricing, initially under $25, shocked the industry upon its debut at the Wescon trade show in 1975. This disruptive strategy was a direct challenge to established firms like Intel and Zilog, whose Z80 was a major competitor in the burgeoning microprocessor market.

Architecture and features

The architecture of the 6502 is a simplified, hardware-optimized version of the Motorola 6800. It features a 8-bit data bus and a 16-bit address bus, allowing it to access 64 KB of memory. A key innovation was its use of a zero-page addressing mode, which treated the first 256 bytes of RAM as a set of fast-access registers to compensate for having only three primary architectural registers: the Accumulator, the X-index register, and the Y-index register. Its instruction set included 56 instructions and supported several addressing modes, including indexed indirect addressing, which was famously utilized by early video game programmers for efficient data manipulation. The processor's clock signal was generated externally, typically by a companion clock generator chip.

Variants and derivatives

The success of the 6502 spawned an extensive family of variants and second-source products. Rockwell International and Synertek became major second-source manufacturers. An enhanced version, the 6502A, offered a slightly higher clock speed. The MOS Technology 6510, which included an integrated I/O port, was custom-designed for the Commodore 64. For the Apple II, Western Design Center produced the WDC 65C02, a CMOS version with reduced power consumption and new instructions. Other notable derivatives include the Ricoh 2A03, which integrated sound synthesis hardware for the Nintendo Entertainment System, and the 6507, a cost-reduced version used in the Atari 2600. The architecture's longevity is evidenced by its use in modern embedded systems.

Applications and impact

The 6502 found its way into a legendary array of consumer electronics, becoming the computational heart of the first wave of personal computers. It powered the Apple I, Apple II, Commodore PET, Commodore VIC-20, and the best-selling Commodore 64. It was equally pivotal in gaming, serving as the central processor for the Atari 2600, Atari 8-bit family, Nintendo Entertainment System, and the BBC Micro. Its affordability allowed companies like Acorn Computers to create educational machines, influencing a generation of programmers in the United Kingdom. The processor's simplicity made it an ideal teaching tool in computer science and a favorite platform for early software crackers and demoscene enthusiasts. Its legacy is deeply embedded in the history of Silicon Valley and the global democratization of computing.

Technical details

The original 6502 was fabricated using an nMOS process and contained approximately 3,510 transistors. It required a single +5V power supply and initially operated at clock speeds of 1-2 MHz, with later variants reaching 3-4 MHz. The processor's machine cycle typically aligned with its clock cycle, making its timing predictable for programmers. It utilized a von Neumann architecture with a shared bus for instructions and data. Interrupt handling was managed through hardware lines for IRQ (maskable interrupt) and NMI (non-maskable interrupt), with a software interrupt instruction (BRK) also available. The reset vector was located at memory address $FFFC, directing the processor to its start-up firmware or kernel code upon power-up.

Category:Microprocessors Category:MOS Technology Category:1975 introductions