HyperTransport

HyperTransport
Name	HyperTransport
Inventor	Advanced Micro Devices
Date	2001
Superseded	Front-side bus
Superseded by	Infinity Fabric

HyperTransport. It is a high-speed, point-to-point computer bus technology designed for interconnecting integrated circuits within computers and embedded systems. Originally developed by Advanced Micro Devices with industry partners, it aimed to replace older front-side bus architectures by providing significantly higher bandwidth and lower latency. The technology found widespread adoption in AMD64-based systems, game consoles, and high-performance network switches.

Overview

The fundamental purpose of this technology was to alleviate the bottlenecks associated with traditional shared-bus designs in modern microprocessor systems. It operates as a bidirectional serial/parallel link with high scalability, allowing it to connect central processing units to northbridges, other processors, and I/O controllers. Key industry backers included companies like Apple Inc., Broadcom, and Cisco Systems, which helped establish it as an open standard. Its design emphasized low pin count and efficient use of power, making it suitable for a range of applications from servers to consumer electronics.

Technical details

The specification employs a packet-based protocol with a fundamental data path width that can be 2, 4, 8, 16, or 32 bits in each direction. Clock speeds have ranged from 200 MHz to over 3.2 GHz, utilizing double data rate signaling to effectively double the transfer rate. This allows for aggregate bandwidths exceeding 51.2 GB/s in later versions. The link uses low-voltage differential signaling to ensure signal integrity and incorporates features for clock skew management. Error detection is handled through cyclic redundancy check mechanisms, and the protocol supports hot swapping capabilities for enhanced system reliability.

Architecture

Architecturally, it is organized in a chain or tree topology, with a host bridge typically acting as the root of the system. Each link consists of two unidirectional sets of signals for transmitting and receiving data, along with a clock signal. The HyperTransport Consortium, which managed the standard, defined a layered protocol encompassing physical, data link, and transaction layers. This layered approach is similar in concept to the Open Systems Interconnection model used in networking. Crucial system components like the AMD Athlon 64 and AMD Opteron processors integrated the technology directly onto the die, reducing reliance on external chipset components.

Applications and usage

Its most prominent application was as the system bus for AMD's K8 and K10 microarchitectures, forming the backbone of the Direct Connect Architecture. It was integral to systems like the PlayStation 3 and the Microsoft Xbox original console for processor-to-chipset communication. In the data center, it was used in multiprocessor configurations for AMD Phenom and AMD Turion-based servers, enabling efficient non-uniform memory access designs. The technology also appeared in high-end workstations, routers from Juniper Networks, and supercomputer projects such as the Cray XT5.

Development and history

Development began in 1997 under the code name "Lightning Data Transport" within Advanced Micro Devices, led by a team that included engineers from Digital Equipment Corporation. The technology was formally announced in 1999 and first implemented in 2001 with the launch of the AMD Athlon MP processor. The HyperTransport Consortium was founded in 2001 by AMD, Apple Inc., and Cisco Systems to promote and standardize the specification. Subsequent revisions, such as versions 2.0 and 3.1, increased speeds and added features like power management states. It was eventually superseded by AMD's proprietary Infinity Fabric interconnect in the Zen era.

Competing technologies

Throughout its lifespan, it faced competition from several other interconnect standards. Intel championed its own front-side bus evolution and later introduced the QuickPath Interconnect for its Nehalem processors. In the high-performance computing space, RapidIO was a major rival for embedded and telecommunications systems. For peripheral connectivity, Peripheral Component Interconnect Express emerged as the dominant standard, though it served a different primary function. Other notable competing or complementary technologies included Intel's Accelerated Hub Architecture, Sun Microsystems's Scalable Processor Architecture, and the Common System Interface used by Intel in its Itanium processors.

Category:Computer buses Category:Computer hardware standards Category:Advanced Micro Devices