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Cortex-M0+

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Article Genealogy
Parent: Arm Holdings Hop 4
Expansion Funnel Raw 59 → Dedup 0 → NER 0 → Enqueued 0
1. Extracted59
2. After dedup0 (None)
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Cortex-M0+
NameCortex-M0+
DesignerARM Holdings
Bits32-bit
Introduced2012
DesignRISC
EncodingThumb
EndiannessLittle
PredecessorCortex-M0
ApplicationMicrocontroller, Embedded system

Cortex-M0+. The Cortex-M0+ is an ultra-low-power, 32-bit RISC processor core designed by ARM Holdings for deeply embedded applications. It serves as an enhanced successor to the Cortex-M0, offering improved energy efficiency and performance for cost-sensitive Internet of Things devices and consumer electronics. The core is widely licensed to semiconductor partners like NXP Semiconductors, Microchip Technology, and STMicroelectronics for integration into various microcontroller products.

Overview

Announced in 2012, the Cortex-M0+ core was developed to address the growing demand for energy-efficient processing in the expanding Internet of Things market. It builds directly upon the foundation of its predecessor, the Cortex-M0, maintaining binary compatibility while reducing active power consumption. The design philosophy emphasizes minimal silicon area and low dynamic power, making it suitable for applications traditionally dominated by 8-bit and 16-bit microcontroller architectures. Its introduction allowed partners like Renesas Electronics and Cypress Semiconductor to offer more capable 32-bit solutions at competitive price points.

Architecture

The Cortex-M0+ architecture implements the ARMv6-M instruction set, utilizing a highly efficient 2-stage pipeline design. It features a simplified Von Neumann architecture with a single 32-bit AMBA bus interface for instruction and data access. Key architectural improvements over the Cortex-M0 include a single-cycle I/O port for faster peripheral access and enhanced debug capabilities through optional Micro Trace Buffer support. The core includes a Nested Vectored Interrupt Controller for low-latency exception handling and supports optional Memory Protection Unit for improved software reliability in safety-critical systems.

Features

A primary feature of the Cortex-M0+ is its exceptional energy efficiency, achieving operation at under 10 µA/MHz on typical semiconductor processes. It supports the complete Thumb instruction set, including hardware integer divide instructions introduced in the ARMv6-M profile. The core offers advanced debug and trace features through an optional Embedded Trace Macrocell and Serial Wire Debug interface. Other notable features include extensive sleep mode support, a wake-up interrupt controller, and compatibility with the CMSIS software standard to simplify development across the ARM ecosystem.

Applications

The Cortex-M0+ processor is ubiquitous in ultra-low-power embedded markets, forming the computational heart of countless Internet of Things sensor nodes and edge devices. It is extensively used in wearable technology, smart home automation products, and portable medical devices from companies like Medtronic. In consumer electronics, it controls functions in Bluetooth Low Energy accessories, touchscreen controllers, and power management units. Industrial applications include PLCs, motor control, and building automation systems supplied by vendors such as Texas Instruments and Infineon Technologies.

Development tools

A comprehensive ecosystem of development tools supports the Cortex-M0+, anchored by the ARM Keil MDK and IAR Embedded Workbench commercial toolchains. The core is fully supported by the open-source GNU Compiler Collection and LLVM infrastructure. Popular integrated development environments include STM32CubeIDE from STMicroelectronics and MCUXpresso IDE from NXP Semiconductors. Hardware debugging is facilitated through probes like the SEGGER J-Link and Lauterbach trace tools, while software libraries are standardized through the CMSIS framework maintained by ARM Holdings.

Variants and licensing

The Cortex-M0+ is available to partners through the ARM Cortex-M processor licensing model, which includes both architectural license and semiconductor intellectual property core formats. Licensed partners have created numerous variants, often integrating the core with custom peripherals and memory technology; examples include the Kinetis L series from NXP Semiconductors and the SAMD21 from Microchip Technology. The design is also utilized in custom ASICs for markets like automotive electronics and industrial control. Its longevity is evidenced by its continued use in new product families alongside more advanced cores like the Cortex-M23 and Cortex-M33.

Category:ARM microarchitectures Category:Microcontrollers Category:Embedded systems