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| Quartus | |
|---|---|
| Name | Quartus |
| Developer | Intel Corporation (originally Altera Corporation) |
| Initial release | 1990s |
| Latest release | ongoing |
| Programming language | C, C++ |
| Operating system | Windows, Linux |
| License | Proprietary, various editions |
| Website | Intel FPGA product pages |
Quartus is a proprietary electronic design automation (EDA) software suite for design, synthesis, place-and-route, timing analysis, and device programming targeting field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), and system-on-chip (SoC) devices. The toolset originated with Altera Corporation and was later developed under Intel Corporation following an acquisition; it integrates with device programming flows, hardware description languages, and third-party IP ecosystems such as those from ARM Holdings, Synopsys, and Cadence Design Systems. Quartus is widely used across industries including telecommunications, aerospace, automotive, and consumer electronics with deployments in companies like Xilinx competitors, systems integrators, and academic institutions such as MIT, Stanford University, and University of Cambridge research labs.
Quartus provides a unified environment for HDL-driven workflows using VHDL, Verilog, and high-level synthesis inputs such as C++ and SystemC. The suite combines synthesis engines, timing analyzers, place-and-route tools, and bitstream generation tied to device families produced by Altera Corporation and later Intel FPGA divisions. Designers use Quartus alongside IP catalogs from vendors like ARM Holdings, Intel Corporation IP, and third-party providers including Imagination Technologies and Lattice Semiconductor for peripherals, memory controllers, and protocol stacks such as PCI Express, Ethernet, and USB.
Quartus traces its lineage to EDA efforts at Altera Corporation in the 1990s, contemporaneous with tools from Xilinx and EDA pioneers like Mentor Graphics and Synopsys. After the 2015 acquisition of Altera by Intel Corporation, development merged with Intel’s FPGA strategy and SoC initiatives that linked Quartus to platforms involving Intel Atom processors and collaborations with ARM Holdings for heterogeneous integration. Over successive generations Quartus incorporated timing analysis advances tied to static timing analysis techniques from Cadence Design Systems and optimization strategies influenced by research at Carnegie Mellon University and UC Berkeley.
Quartus contains modules for design entry, synthesis, fitting, and timing closure, leveraging algorithms inspired by academic work from University of California, Los Angeles and industrial contributions from Bell Labs researchers. Key components include the Design Entry GUI, HDL compilers for VHDL and Verilog, support for SystemVerilog assertions, timing-driven placement and routing engines, and a configuration file generator for device programming. The architecture integrates simulation hooks compatible with tools from Synopsys (for example, VCS) and Mentor Graphics (ModelSim), and supports embedded debug via on-chip logic analyzers akin to innovations from Xilinx research groups. Quartus also offers power analysis utilities comparable to methodologies from Texas Instruments power teams and integrates synthesis pragmas influenced by industry standards such as those by IEEE working groups.
Quartus primarily targets device families originally produced by Altera Corporation and continued under Intel FPGA branding, including FPGA families comparable to competitors from Xilinx and fabric-centric products related to those by Lattice Semiconductor. Supported platforms include development boards from partners like Terasic, reference designs incorporating processors from ARM Holdings and Intel Atom, and aerospace-grade implementations influenced by standards from agencies such as NASA and ESA. The software runs on host operating systems including Microsoft Windows and multiple Linux distributions used in enterprise settings by companies like Google and Amazon Web Services for cloud-based build farms.
Quartus is distributed under proprietary licensing models with multiple editions tailored for different market segments: Lite editions for education and hobbyists (comparable in availability to offers from Xilinx’s free toolchains), Standard and Pro editions targeting commercial development, and specialized bundles for SoC integration used in collaborations with ARM Holdings and IP vendors such as Synopsys. Licensing mechanisms include node-locked keys and floating licenses managed through servers like those from Flexera and enterprise agreements with organizations such as Siemens corporate EDA procurement teams.
Quartus has followed a multi-decade release cadence with major versions aligning to new device families and process geometries promoted by Intel Corporation manufacturing roadmaps. Significant milestones correspond to device launches and architectural shifts, paralleling industry transitions chronicled alongside companies like TSMC and GlobalFoundries for process nodes. Versioning conventions reflect major feature increments, service packs, and beta releases coordinated with partner ecosystems including ARM Holdings, Synopsys, and board vendors such as Terasic.
Quartus is evaluated in industry comparisons alongside tools from Xilinx and EDA vendors like Cadence Design Systems and Synopsys, with strengths cited in tight integration to Intel FPGA product lines and comprehensive SoC flows used by telecommunications firms like Ericsson and networking equipment manufacturers such as Cisco Systems. Academic labs at MIT, ETH Zurich, and University of Toronto have adopted Quartus for teaching digital design and experimental projects. Criticisms observed in forum discussions and conference panels at events like FPGA Conference and Design Automation Conference often focus on learning curves, ecosystem lock-in, and comparisons of synthesis quality against third-party tools, while proponents highlight device-specific optimizations and vendor-supported IP stacks used in commercial deployments by firms including Intel Corporation customers in data center and automotive supply chains.
Category:Electronic design automation software