Generated by GPT-5-mini| MIPS64 | |
|---|---|
| Name | MIPS64 |
| Developer | MIPS Technologies |
| Type | Instruction set architecture |
| Introduced | 1990s |
| Design | Reduced instruction set computing |
| Bits | 64-bit |
| Endianness | Big-endian and little-endian |
| Successors | MIPS64 Release 6, RISC-V (as alternative) |
MIPS64
MIPS64 is a 64-bit reduced instruction set computing (RISC) instruction set architecture developed for high-performance microprocessors. It extends the 32-bit architecture developed by MIPS Technologies and has been implemented across microprocessor families used in workstations, servers, embedded systems, and networking equipment. MIPS64 influenced and was influenced by designs from companies and institutions such as Silicon Graphics, NEC, Broadcom Corporation, Sony Corporation, and Nintendo.
MIPS64 provides a 64-bit general-purpose execution model and a 64-bit address space, emphasizing simple instruction formats and pipelines for high clock rates. The architecture saw adoption in products from Silicon Graphics, NEC, Siemens, and Toshiba Corporation and competed with contemporaries like Intel, AMD, ARM Limited, and PowerPC. Academic projects at Stanford University, University of California, Berkeley, and Carnegie Mellon University used MIPS64 principles in teaching and research. Licensing and implementation involved firms such as MIPS Technologies (later part of Imagination Technologies) and later entities including Wave Computing and Synopsys.
MIPS64 retains classic RISC features: fixed-length 32-bit instructions, load/store architecture, and simple encoding to simplify decoding and pipelining. It introduced 64-bit arithmetic, 64-bit logical operations, and address translation features compatible with 64-bit virtual memory systems used by vendors like SGI and NEC Corporation. Instruction set extensions and modes were influenced by ecosystem players such as IBM and Sun Microsystems in server markets. MIPS64 variants included floating-point and single-instruction-multiple-data features comparable to those in designs from ARM Holdings and Intel Corporation. Control registers and system-level instructions were adapted to support operating systems and hypervisors from vendors like Oracle Corporation and Red Hat.
MIPS64 uses a register file with thirty-two 64-bit general-purpose registers plus special registers for program counter, hi/lo multiplication results, and coprocessor state, analogous to register sets in architectures produced by Intel and IBM. Floating-point registers follow IEEE 754, enabling interoperability with floating-point libraries from organizations such as GNU Project and Free Software Foundation. Calling conventions used in compiler toolchains from GCC and LLVM define register usage, stack frame layout, and parameter passing compatible with binaries produced by vendors like Silicon Graphics and Toshiba Corporation. ABI specifications helped software portability similar to efforts by POSIX proponents and standards groups like IEEE.
Commercial implementations spanned from server-class microprocessors in systems by Silicon Graphics and NEC to embedded cores in networking silicon by Broadcom Corporation and consumer devices by Sony Corporation and Nintendo. Variants included multiply-optimized cores, fine-grain multithreading designs, and cores with integrated memory management units used by companies such as Fujitsu and Hitachi. Later releases and forks—driven by licensing changes at MIPS Technologies and acquisitions by Imagination Technologies and Wave Computing—produced updated releases and community implementations comparable to open efforts at RISC-V International and academic cores at University of California, Berkeley.
Operating system ports included major UNIX and UNIX-like systems such as IRIX on workstations, NetBSD and OpenBSD in portable BSD distributions, and Linux kernel support maintained within communities like Debian and Gentoo Linux. Proprietary systems from vendors such as SGI and corporate distributions used vendor toolchains and libraries from GNU Project and commercial compilers from companies like Fujitsu and MIPS Technologies. Virtualization and hypervisor support mirrored developments by VMware and cloud providers who integrated support for 64-bit architectures, while embedded RTOS vendors such as Wind River Systems provided real-time support.
MIPS64 architectures targeted high-throughput integer and floating-point computing in areas including graphics workstations by Silicon Graphics, telecom and networking equipment by Cisco Systems-era vendors, and gaming consoles by Sony Corporation and Nintendo. Performance comparisons often cited peers like Intel Xeon, AMD Opteron, and IBM POWER families in server benchmarks, and embedded comparisons involved ARM Cortex-A series. Specialized implementations excelled in packet processing and DSP workloads relevant to firms like Texas Instruments and Broadcom Corporation.
The evolution of MIPS64 traces back to the original RISC research and commercial efforts that produced the 32-bit architecture, with major commercial adoption in the 1990s by Silicon Graphics and others. Corporate transactions—among MIPS Technologies, Imagination Technologies, Wave Computing, and subsequent entities—shaped licensing and development. Academic influence included curricula at Stanford University and University of California, Berkeley that used MIPS architectures for instruction set teaching, while industry competition with Intel, ARM Limited, IBM, and later RISC-V drove innovation and eventual market shifts. Legacy deployments continue in embedded systems, while historical designs inform modern microarchitecture research at institutions such as Massachusetts Institute of Technology and companies pursuing alternative ISA strategies.