Generated by GPT-5-mini| Lamport's bakery algorithm | |
|---|---|
| Name | Lamport's bakery algorithm |
| Author | Leslie Lamport |
| Introduced | 1974 |
| Paradigm | Mutual exclusion, concurrency, distributed algorithm |
| Language | Formal pseudocode |
| Status | Classical |
Lamport's bakery algorithm is a classic mutual exclusion algorithm devised by Leslie Lamport for coordinating concurrent processes in shared-memory systems. It provides a wait-free mechanism for assigning logical "tickets" to processes, ensuring orderly access to a critical section while avoiding deadlock and starvation under certain assumptions. The algorithm is notable in the history of computer science for its simplicity and influence on later work in concurrency control, distributed systems, and operating system design.
Lamport proposed the bakery algorithm in the context of research at the University of California, Berkeley and Massachusetts Institute of Technology where issues of process coordination were central to projects like Multics and early Unix development. The work followed prior results such as Dijkstra's mutual exclusion algorithm, Peterson's algorithm, and theoretical contributions by Edsger W. Dijkstra, Tony Hoare, and Per Brinch Hansen. Lamport framed the problem using concepts from synchronization (computer science), inter-process communication, and formal models influenced by Turing machine theory and the Lambda calculus. The algorithm appears alongside Lamport's other influential contributions, including Lamport timestamps, the happens-before relation, and the Paxos family of consensus protocols developed later in his career while affiliated with Digital Equipment Corporation and Microsoft Research.
The algorithm models each thread or process obtaining a ticket from a shared array, resembling a queue at a bakery counter, a metaphor inspired by everyday systems like the Sears or Kroger retail queuing practices rather than formal queueing theory. Each process uses shared arrays Ticket[] and Choosing[] to advertise intent and number. Entry and exit protocols are specified in pseudocode similar to constructs used in Ada (programming language), C and Pascal literature of the 1970s. The steps resemble atomic reads and writes as in models like the RAM model (computational model), with assumptions comparable to those in Lamport's Bakery algorithm contemporaneous analyses by researchers at Bell Labs and IBM Research. Processes set Choosing[i]=true, compute Ticket[i]=1+max(Ticket[0..n-1]), set Choosing[i]=false, then wait until for every j either Choosing[j]==false and (Ticket[j]==0 or (Ticket[j],j) > (Ticket[i],i)). The exit section sets Ticket[i]=0. The algorithm assumes sequential consistency as defined by models used in Leslie Lamport's other work and relates to memory models discussed at ACM SIGOPS and IEEE venues.
Lamport proved key properties including mutual exclusion, i.e., at most one process in the critical section, and first-come-first-served fairness under idealized conditions; these proofs invoke reasoning similar to that in Hoare logic and formal verification traditions exemplified by Z notation and TLA+ later championed by Lamport himself. The algorithm guarantees bounded overtaking and uses lexicographic ordering on pairs (ticket, process id), an approach echoed in ordering techniques from Erlang concurrency models and Communicating Sequential Processes by Tony Hoare. Safety properties align with specifications considered in the International Organization for Standardization and the Institute of Electrical and Electronics Engineers standards discussions on concurrent program correctness. Liveness properties depend on assumptions about atomicity of reads/writes and absence of failures, conditions also examined in Byzantine fault tolerance and FLP impossibility literature where failure models critically affect guarantees.
Time and space costs of the bakery algorithm reflect per-process arrays of size n as in shared-memory protocols studied in Amdahl's law analyses and multicore scaling research at Intel and AMD. Each entry attempt requires scanning other processes' tickets, yielding O(n) time complexity per entry and O(n) space overall; this is comparable to other n-process mutual exclusion schemes such as Peterson's algorithm generalized to n or tournament tree locks used in parallel computing infrastructures. The algorithm's overhead in cache-coherent multiprocessors interacts with memory consistency models developed by IBM and SUN Microsystems researchers; performance in practice is influenced by factors studied at USENIX conferences and benchmark suites like those from SPEC. Under heavy contention, the ticket assignment and busy-waiting pattern produce scalability limits similar to those observed in spinlocks and ticket locks deployed in Linux kernel and FreeBSD synchronization primitives.
Several variants adapt the bakery idea to weaker memory models, fault-prone environments, and different machine architectures. Extensions include fault-tolerant adaptations linked to Paxos-style consensus and work intersecting with Lamport timestamps ordering, as well as modifications employing atomic primitives like compare-and-swap and load-link/store-conditional found in ARM and x86 architectures. Researchers at institutions such as MIT, Stanford University, UC Berkeley, and University of Cambridge have produced formalizations in TLA+ and mechanized proofs in systems like Coq and Isabelle/HOL, connecting to verification projects by teams at Microsoft Research and INRIA. Other extensions explore randomized backoff analogous to designs from Google and Facebook engineering blogs and hybrid schemes combining bakery semantics with hierarchical locks used in NUMA-aware schedulers by Red Hat and Oracle engineers.
While the bakery algorithm serves primarily as a theoretical benchmark and teaching example in curricula at institutions like Carnegie Mellon University, ETH Zurich, and Princeton University, it has inspired practical synchronization constructs. Implementations appear in academic operating systems projects, concurrency textbooks by authors affiliated with MIT Press and Addison-Wesley, and demonstrative code in repositories maintained by contributors from GitHub and SourceForge. Industrial kernels and runtime libraries more commonly use low-level atomic-based locks from Intel and ARM toolchains, but the bakery algorithm remains cited in standards discussions at IEEE and in verification case studies conducted by NASA and ESA for safety-critical systems. Its pedagogical role persists in courses on distributed systems and concurrency theory at international conferences such as ACM SIGPLAN and IEEE INFOCOM.
Category:Concurrency control