IEEE Computer Society Technical Committee on Parallel Processing
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| IEEE Computer Society Technical Committee on Parallel Processing | |
|---|---|
| Name | IEEE Computer Society Technical Committee on Parallel Processing |
| Abbreviation | TC on Parallel Processing |
| Formation | 1978 |
| Type | Technical committee |
| Headquarters | Piscataway, New Jersey |
| Region served | Worldwide |
| Parent organization | Institute of Electrical and Electronics Engineers · IEEE Computer Society |
IEEE Computer Society Technical Committee on Parallel Processing
The IEEE Computer Society Technical Committee on Parallel Processing is a standing committee within the Institute of Electrical and Electronics Engineers and the IEEE Computer Society that concentrates on research, development, and dissemination of knowledge in parallel computing, high-performance computing, distributed systems, and heterogeneous architectures. The committee interfaces with organizations such as ACM, National Science Foundation, Department of Energy (United States), European Union, and collaborates with institutions including Lawrence Livermore National Laboratory, Argonne National Laboratory, Los Alamos National Laboratory, and universities such as Stanford University, Massachusetts Institute of Technology, University of Illinois Urbana-Champaign, and University of Cambridge.
History
Founded in the late 1970s amid advances in vector processing and distributed memory systems, the committee emerged as part of the IEEE Computer Society reorganization that paralleled developments at institutions like Sandia National Laboratories, Oak Ridge National Laboratory, Cray Research, and corporations including IBM, Intel, DEC, and Hewlett-Packard. Early interactions connected to events such as the rise of the Cray-1, the PARC (Palo Alto Research Center) innovations, and programs funded by the DARPA and the National Science Foundation (United States), with members contributing to milestones linked to projects like PVM and MPI and research at centers like CERFACS and CERN. Through the 1990s and 2000s the committee adapted to shifts driven by innovations from NVIDIA, AMD, and initiatives such as the TOP500 list and the Human Brain Project, while engaging with policy and funding bodies like the European Commission and the US Congress.
Membership and Organization
Membership comprises academics from University of California, Berkeley, Princeton University, Carnegie Mellon University, and ETH Zurich; industry researchers from Google, Microsoft Research, Facebook (Meta), and Amazon Web Services; and national laboratory scientists from NERSC, Riken, and CEA. Governance follows IEEE committee norms with elected chairs, vice-chairs, and secretary roles, and liaisons to working groups tied to organizations such as ACM SIGARCH, ACM SIGPLAN, ISI (Information Sciences Institute), and ITU. Subcommittees align with topics represented by standards bodies including ISO, ANSI, and working groups that interface with projects like OpenMP, OpenACC, MPI and vendor consortia such as Khronos Group and OpenAI research partnerships.
Activities and Initiatives
The committee sponsors technical programs, special sessions, and curricula initiatives collaborating with entities like IEEE Standards Association, National Institutes of Health, European HPC Joint Undertaking, and research centers such as Barcelona Supercomputing Center and Jülich Research Centre. It runs education efforts touching on pedagogy used at Imperial College London, Tsinghua University, Purdue University, and supports workshops tied to initiatives like Exascale Computing Project and consortia including HPC Wales and PRACE. The committee issues calls for papers, organizes panels with participants from Bell Labs, Google DeepMind, Microsoft Azure, and curates tutorials reflecting technology from ARM, RISC-V, and accelerator vendors.
Conferences and Workshops
The Technical Committee organizes and sponsors conferences and workshops associated with flagship events such as SC Conference (Supercomputing), IPDPS (IEEE International Parallel and Distributed Processing Symposium), HPCA (High-Performance Computer Architecture), PPOPP (Principles and Practice of Parallel Programming), and collaborates with events like Euro-Par, ICS (International Conference on Supercomputing), CCGrid, EuroSys, and USENIX. It supports special tracks, panels, and doctoral workshops featuring participants from SIGARCH, SIGPLAN, SIGOPS, and industry labs including Sandia National Laboratories, IBM Research, and Intel Labs.
Publications and Standards
The committee contributes to publications in venues such as the IEEE Transactions on Parallel and Distributed Systems, IEEE Computer, IEEE Micro, and proceedings for IPDPS and SC Conference, and coordinates with publishers like ACM Press, Springer, and Elsevier. It liaises with standards activities spanning MPI-3, OpenMP 5.0, POSIX, and emerging specifications influenced by companies such as NVIDIA and consortia like the Khronos Group. Committee members serve on editorial boards for journals including Journal of Parallel and Distributed Computing, Concurrency and Computation: Practice and Experience, and on steering committees for series like Lecture Notes in Computer Science.
Awards and Recognition
The committee administers and endorses awards recognizing contributions mirrored by honors from IEEE Fellow, ACM Fellow, the Turing Award, the IEEE John von Neumann Medal, and prizes given at conferences like IPDPS and SC Conference. It nominates candidates for distinctions from National Academy of Engineering, Royal Society, ACM SIGPLAN Distinguished Service Award, and national science prizes in countries represented by members from Japan Society for the Promotion of Science and the European Research Council.
Impact and Contributions to Parallel Computing
Through leadership in program organization, editorial stewardship, standards engagement, and education, the committee influenced developments related to MPI, OpenMP, accelerator programming models from NVIDIA CUDA, heterogeneous systems integrating ARM and x86-64 architectures, and large-scale systems such as those at Oak Ridge National Laboratory, Lawrence Berkeley National Laboratory, and Fujitsu installations. Contributions shaped curricula at MIT, Stanford University, and ETH Zurich, influenced government-funded programs like Exascale Computing Project and collaborations with PRACE and XSEDE, and fostered interdisciplinary efforts bridging groups at Los Alamos National Laboratory, Argonne National Laboratory, and industry partners such as IBM and Intel.