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| Hammer (microarchitecture) | |
|---|---|
| Name | Hammer |
| Designer | Advanced Micro Devices |
| Produced | 2003–2005 |
| Clock | 1.0–2.4 GHz |
| Cores | 1–2 (initial) |
| Process | 130 nm, 90 nm |
| Successor | AMD K8L |
Hammer (microarchitecture) is a microarchitecture developed by Advanced Micro Devices as the successor to the Athlon family, introducing a native 64-bit architecture to mainstream x86 processors. Released in 2003, Hammer combined elements from prior AMD designs with innovations targeting server, workstation, and desktop markets dominated by Intel. The design underpinned products across the Opteron, Athlon 64, and Sempron brands, influencing later generations and competitive responses.
Hammer debuted as AMD's strategic response to market shifts centered on x86 longevity and the emerging 64-bit demands from Microsoft and Linux-based server deployments. The microarchitecture integrated a new 64-bit instruction set developed in coordination with industry partners and reflected AMD's roadmap goals that involved scalability across socket platforms such as Socket 940 and Socket 754. Its launch impacted the competitive landscape that included Intel Pentium 4, Itanium, and other contemporaries during the mid-2000s.
Hammer featured a redesigned core incorporating a front-end, out-of-order execution engine, and memory subsystem influenced by prior AMD projects. The front-end included an instruction fetcher and decoder compatible with legacy IA-32 code and the new 64-bit mode, while the pipeline supported a wide dispatch and multiple execution units for integer, floating-point, and SIMD operations. Key structural elements were a large unified L2 cache in some models, an integrated memory controller supporting DDR SDRAM and later DDR2 SDRAM, and HyperTransport links for coherent interconnects between processors and chipsets such as AMD Athlon 64 FX platforms. The microarchitecture also emphasized power management and thermal controls aligned with industry standards advocated by organizations like the ACPI forum.
Hammer introduced AMD's 64-bit extension to the x86 architecture, widely known as AMD64, designed to extend IA-32 while preserving compatibility with existing x86 software ecosystems including Windows XP, Red Hat Enterprise Linux, and SuSE Linux. The instruction set added 64-bit general-purpose registers, a larger linear address space, and new calling conventions used by compilers from Microsoft Visual Studio, GCC, and AMD CodeAnalyst tools. The microarchitecture also implemented SIMD enhancements like SSE2 and later SSE3 support, enabling optimization by software from vendors such as Oracle, Sun Microsystems, and SAP.
Upon release, Hammer-based processors delivered competitive integer performance and improved real-world application throughput in server and workstation workloads compared to contemporaries from Intel Corporation. Benchmarks from independent labs and industry publications evaluated performance across databases like Oracle Database, web servers running Apache HTTP Server, and scientific workloads using LINPACK and SPEC CPU2000 suites. The integrated memory controller and 64-bit addressing provided notable advantages in memory-intensive applications, influencing adoption in data centers run by organizations including Yahoo!, eBay, and research institutions using clusters managed with PBS Professional.
Hammer served as the foundation for AMD product lines including Opteron, Athlon 64, Athlon 64 X2, and later low-cost Sempron models. Server implementations used multi-socket motherboards built by vendors such as Tyan Technology and Supermicro, while desktop and workstation platforms were offered by OEMs like Dell, HP (Hewlett-Packard), and Lenovo (formerly IBM PC Division customers). Chipset partners including NVIDIA (via nForce), VIA Technologies, and ATI Technologies provided southbridge and northbridge components for various motherboard designs.
The Hammer project originated in AMD research groups collaborating across divisions and with external partners to define the 64-bit extension and microarchitectural goals. Design trade-offs balanced compatibility with x86 binaries against the need to innovate features such as an integrated memory controller and coherent HyperTransport links, reflecting learnings from earlier efforts like the K7 (microarchitecture) and strategic moves influenced by competitive products such as Intel Itanium. The timeline included tape-outs at foundries like GlobalFoundries predecessors and process shrinks from 130 nm to 90 nm executed with manufacturing partners including TSMC and Samsung Electronics.
Industry reception acknowledged Hammer as a pivotal shift that validated AMD's ability to innovate on the x86 platform, prompting responses from Intel Corporation in subsequent architectures and roadmap adjustments in firms including Microsoft and enterprise software vendors. Hammer's AMD64 architecture became the industry standard for 64-bit x86 computing, later adopted and extended across multiple processor families and influencing server deployments at scale by companies such as Google and Amazon Web Services. The microarchitecture's legacy persists in modern x86-64 designs and in historical analyses by technology historians and publications like IEEE Spectrum and AnandTech.
Category:Microarchitectures Category:Advanced Micro Devices processor microarchitectures