Generated by GPT-5-mini| Cyrix MII | |
|---|---|
| Name | Cyrix MII |
| Produced start | 1998 |
| Produced end | 1999 |
| Slowest | 233 |
| Fastest | 450 |
| Slowest unit | MHz |
| Fastest unit | MHz |
| Sold by | Cyrix |
| Designfirm | Cyrix |
| Manuf1 | National Semiconductor |
| Size from | 0.35 |
| Size unit | µm |
| Architecture | x86 |
| Socket | Socket 7 |
Cyrix MII
The Cyrix MII was a 1998 x86 microprocessor family produced by Cyrix and manufactured by National Semiconductor targeting the desktop computer and workstation markets during the late 1990s. Positioned against contemporaries from Intel and AMD, the MII sought to balance cost and multimedia performance with an emphasis on integer throughput and floating-point enhancements derived from earlier Cyrix designs. It competed in ecosystems dominated by platforms such as Socket 7, chipset vendors like VIA Technologies and Intel 430TX, and OEMs including Compaq, Dell, and Gateway 2000.
The MII lineage traced technical roots to the Cyrix designs that followed the Cyrix 6x86 and the earlier M1 (Cyrix) efforts, while sharing market space with the Intel Pentium II, AMD K6, and the IDT WinChip families. Released amid consolidation in the semiconductor industry, the product involved partnerships with National Semiconductor for fabrication and with board makers such as ASUS, AOpen, and Gigabyte Technology for Socket 7 motherboards. Market positioning emphasized multimedia benchmarks promoted by consortia like the Multimedia PC (MPC) program and software vendors including 3Dlabs and NVIDIA which influenced perceived value in gaming and productivity segments.
Architecturally, the MII implemented an x86-compatible superscalar core that evolved from Cyrix's earlier in-order microarchitecture used in the 6x86. It featured an integer pipeline optimized for branch prediction techniques similar to those explored in research at Intel and IBM labs, and incorporated floating-point unit (FPU) improvements inspired by academic work from institutions like MIT and Stanford University. The die used a 0.35 µm CMOS process in National Semiconductor fabs comparable to processes at Texas Instruments and TSMC of the era. Cache hierarchy included L1 instruction and data caches and optional external L2 cache behavior depended on motherboard designs from vendors like Award Software and Phoenix Technologies BIOS implementations. Bus interface was compatible with the Socket 7 front-side bus standards prevalent in systems using chipsets such as VIA Apollo and Intel 430HX.
In integer-heavy workloads, the MII often matched or exceeded contemporaries in benchmarks promoted by publications like PC Magazine and Computers & Electronics, and by benchmarking suites such as SPECint and Dhrystone. Floating-point performance varied versus the Pentium II and AMD K6 in multimedia tests using applications from Adobe Systems and 3D games powered by engines like id Tech and Quake II Engine, where drivers and AGP chipset support from Intel and NVIDIA affected results. Independent reviewers referenced scores from tools like SiSoft Sandra and 3DMark to compare throughput, while thermals and power consumption were analyzed against notebooks and desktops using power management techniques similar to those in ACPI specifications championed by industry consortiums.
Cyrix and National Semiconductor released several clock-speed variants of the MII, ranging from around 233 MHz to 450 MHz, branded for retail and OEM channels through distributors such as Ingram Micro and Tech Data. Variants included revisions targeting different multiplier-locking schemes and voltage levels, aimed at compatibility with Socket 7 boards by manufacturers like MSI, Chaintech, and Abit. Some models were marketed with performance-equivalent ratings to compete with Pentium-branded CPUs used by Hewlett-Packard and IBM in their product lines, while other steppings addressed errata identified in test suites run by third-party labs such as UL and Intertek.
The MII was pin-compatible with the Socket 7 ecosystem, enabling upgrades in systems originally built for the Intel Pentium and supporting chipsets from VIA, SiS, and Intel. BIOS support by firms like Award Software and Phoenix Technologies was critical for memory timing and cache control, influencing compatibility with SDRAM modules and boards supporting AGP and PCI expansion common in systems from Gateway 2000 and Packard Bell. Compatibility testing with operating systems from Microsoft including Windows 98 and Windows NT, as well as with Linux distributions maintained by projects like the Linux Kernel community and application stacks from Mozilla Foundation and OpenOffice.org, shaped adoption in both consumer and small business deployments.
Reception of the MII mixed favorable assessments of price-to-performance with criticism over FPU performance and driver-level optimizations compared to Intel and AMD offerings; coverage appeared in PC World, Byte (magazine), and Tom's Hardware Guide. Commercial pressures, including consolidation of fabs and strategic shifts by National Semiconductor and Cyrix, led to limited long-term support, with intellectual property and personnel later influencing other projects at VIA Technologies and in embedded CPU initiatives by firms like SiS and Transmeta. Historically, the MII exemplifies late-1990s competition in the x86 landscape alongside milestones such as the introduction of the Pentium III and the maturation of the AMD Athlon, and it remains a studied example in retrospectives by institutions like the Computer History Museum and in technical analyses from academic conferences such as IEEE Symposium on VLSI Circuits.
Category:Microprocessors Category:Cyrix products