This article was accepted into the corpus but its outbound wikilinks were never NER-processed — typical at the deepest BFS hop or when the run's entity cap was reached. No expansion funnel to show.
| Cryptographic Hardware and Embedded Systems (CHES) | |
|---|---|
| Name | Cryptographic Hardware and Embedded Systems (CHES) |
| Status | Active |
| Discipline | Cryptography; Embedded systems; Computer engineering |
| Frequency | Annual |
| First | 1999 |
| Organizer | International Association for Cryptologic Research; IACR |
| Location | Varies (international) |
Cryptographic Hardware and Embedded Systems (CHES) is an annual scholarly conference and research community focusing on the design, analysis, and implementation of cryptographic primitives and protocols in resource-constrained devices. The venue brings together researchers, engineers, and practitioners from academic institutions, industry laboratories, and standards bodies to address practical and theoretical problems at the intersection of Applied Cryptography, Computer Architecture, Electrical Engineering, Information Security, and Embedded Systems. CHES has shaped advances in secure design for smartcards, Internet of Things devices, and secure elements used by major corporations and governments.
CHES serves as a forum for presenting peer-reviewed work on cryptographic primitives, secure processors, low-power implementations, and tamper-resistant modules. Participants include representatives from International Association for Cryptologic Research, National Institute of Standards and Technology, European Union Agency for Cybersecurity, Intel Corporation, ARM Holdings, STMicroelectronics, Infineon Technologies, NXP Semiconductors, and universities such as Massachusetts Institute of Technology, Stanford University, ETH Zurich, École Polytechnique Fédérale de Lausanne, and University of Cambridge. The program typically comprises technical papers, invited talks, tutorials, and workshops that connect theoretical advances in Public-key cryptography, Symmetric-key algorithms, and Cryptographic protocols with physical realization in devices like smart cards, secure elements, field-programmable gate arrays, and microcontrollers from vendors such as Microchip Technology and Texas Instruments.
CHES originated in the late 1990s amid growing demand for secure hardware driven by deployments of EMV, SIM cards, and embedded secure applications in consumer electronics. Early meetings reflected collaborations among researchers from Gemplus, Siemens, Philips, and academic labs at Technische Universität Darmstadt and Cambridge University Engineering Department. Over subsequent decades CHES expanded alongside developments in RSA Laboratories research, the rise of Elliptic-curve cryptography adoption by organizations like NSA and NIST, and the proliferation of Internet of Things initiatives backed by industry consortia such as Bluetooth SIG and Zigbee Alliance. Milestones reported at CHES include efficient implementations of AES, compact designs for RSA, side-channel disclosures affecting products from Infineon Technologies and NXP Semiconductors, and the integration of post-quantum proposals from researchers at Google Research and Dartmouth College.
Core topics at CHES cover algorithmic optimizations for constrained platforms, secure compilation for embedded processors, fault-injection resilience, formal verification of hardware, and evaluation of random number generators. Typical challenges discussed involve balancing throughput, area, and power for implementations on platforms such as ARM Cortex-M and RISC-V cores; integrating countermeasures against attacks reported by teams at Ruhr-Universität Bochum, KU Leuven, and École Normale Supérieure; and adapting cryptography to standards advocated by IETF and ISO. Emerging research themes include post-quantum cryptography adoption pioneered by research groups at NIST Post-Quantum Cryptography project, secure multi-party computation in embedded contexts, and supply-chain resilience prompted by incidents examined by European Commission and United States Department of Commerce.
Presentations detail implementations on technologies ranging from custom ASIC designs produced by fabs like TSMC to reconfigurable FPGA platforms from Xilinx and Intel (Altera). Papers frequently evaluate trade-offs of hardware implementations for algorithms such as AES, ChaCha20-Poly1305, Edwards-curve Digital Signature Algorithm, and McEliece variants. Architectural approaches include bit-serial and parallel datapaths, threshold implementations from research at Masaryk University and Nanyang Technological University, and co-design strategies linking hardware security modules from vendors like Thales Group with software stacks from OpenSSL and WolfSSL.
Side-channel research at CHES encompasses power analysis, electromagnetic analysis, timing attacks, and fault injection techniques developed by groups at University of Massachusetts Amherst, Technical University of Denmark, and Tsinghua University. Countermeasure strategies presented include masking, hiding, leakage-resilient cryptography, and hardware noise-injection designs influenced by standards discussions at Common Criteria evaluations and certification bodies like CCN and ANSSI. Notable contributions involve attack demonstrations that influenced product recalls and design revisions at companies such as Infineon Technologies and academic discoveries that led to mitigation standards referenced by NIST.
CHES research often informs standards and certification efforts by organizations including NIST, ISO/IEC JTC 1/SC 27, IETF, and ETSI. Methodologies for side-channel evaluation, validation test suites for true random number generators, and criteria for physical unclonable functions have been refined by collaborative efforts involving FIDO Alliance, PCI Security Standards Council, Bluetooth SIG, and national labs like Fraunhofer Society and Sandia National Laboratories. CHES papers also propose benchmarks and open-source frameworks that complement evaluation tools from academic groups such as DPAcontest and repositories hosted by University of Bristol.
Work showcased at CHES directly impacts secure payment systems like EMVCo specifications, mobile secure elements used by Apple Inc. and Google LLC, automotive security platforms adopted by Bosch and Continental AG, and industrial control systems supplied by Siemens AG. Research outputs influence product certification, guide procurement policies in agencies such as European Commission and United States Department of Defense, and drive commercial innovation in trusted execution environments developed by Intel Corporation and ARM Holdings. The conference continues to bridge academic advances with industrial deployment, shaping secure hardware used across consumer electronics, telecommunications, finance, and critical infrastructure.
Category:Cryptography conferences