Berkeley RISC-V project

Berkeley RISC-V project
Name	Berkeley RISC-V project
Caption	RISC-V logo and processor diagram
Developer	University of California, Berkeley
Released	2010s
Programming language	C (programming language), Verilog, Chisel (hardware description language)
Platform	RISC-V
License	BSD license, Apache License

Berkeley RISC-V project is an initiative originating at University of California, Berkeley that produced the open Instruction set architecture known as RISC-V and associated implementations, cores, and toolchains. The project links research groups, industrial partners, and standards efforts involving entities such as SiFive, Western Digital, NVIDIA, Google (company), and Alibaba Group. Work from the project influenced processor designs used in products from Intel Corporation, AMD, Arm Ltd., Samsung Electronics, and academic platforms like RISC-V International.

History and Development

The project began under faculty at University of California, Berkeley including researchers connected to Parallel Computing Laboratory and collaborations with graduate students affiliated with Computer Science Division, Berkeley. Early milestones intersected with milestones at International Symposium on Computer Architecture, ACM SIGARCH, IEEE Micro, Hot Chips Conference, and exhibitions at International Solid-State Circuits Conference. The RISC-V ISA emerged alongside historical lineages such as Reduced instruction set computer, MIPS (microprocessor), SPARC, ARM architecture, and design philosophies evident in Berkeley RISC work and projects like RISC (programming). Funding and partnerships involved organizations such as DARPA, National Science Foundation, Google (company), and industrial research arms from Hewlett-Packard, leading to standards discussions with RISC-V International and outreach at events like FOSDEM, Linux Foundation gatherings, and Open Source Summit.

Architecture and Design

The RISC-V ISA defined by the project specifies base integer sets and optional extensions influenced by architectures like x86 architecture, ARM architecture, and academic designs from Stanford University and MIT. Architectural design choices reference concepts implemented in Reduced instruction set computer work and formal methods practiced at Computer Science Division, Berkeley and conferences such as PLDI and POPL. The architecture supports extensions for floating point via references to IEEE 754-1985, vector processing inspired by Vector processor research at Cray Research, and privileged architecture layers analogous to mechanisms discussed in Trusted Computing Group contexts. Microarchitecture implementations used languages and frameworks from Verilog and Chisel (hardware description language), adopting verification practices from Coq (proof assistant), ACL2, and model-checking research presented at CAV.

Implementations and Variants

Implementations that grew out of the project include cores and systems from entities like SiFive, Western Digital, NVIDIA, Alibaba Group, Microchip Technology, and academic demonstrators from Massachusetts Institute of Technology and ETH Zurich. Notable variants reference microarchitectures akin to designs in SPARC, MIPS (microprocessor), and superscalar approaches seen in Intel Pentium research. Silicon prototypes appeared in collaboration with foundries such as TSMC, GlobalFoundries, and UMC, while FPGA implementations leveraged hardware from Xilinx and Intel (company) FPGA product lines. Commercial products informed by the ISA include SoCs in devices produced by SiFive partners and storage controllers from Western Digital.

Software Ecosystem and Toolchain

The toolchain ecosystem includes adaptations of GCC, LLVM, QEMU, and operating systems such as Linux (kernel), FreeBSD, and hobbyist ports originating from projects at University of California, Berkeley and communities around GitHub. Tooling integrates with debuggers like GDB and build systems connecting to GNU Make and CMake. Simulation and verification tools link to projects such as Spike (ISA simulator), academic simulators used in ISCA papers, and formal verification efforts tied to Coq (proof assistant) and SMT (satisfiability modulo theories) solvers discussed at SAT Conference. Ecosystem growth involved corporate contributors including Google (company), IBM, NVIDIA, and open source foundations like Linux Foundation and Apache Software Foundation.

Performance, Evaluation, and Benchmarks

Evaluation studies published in venues like ISCA, ASPLOS, MICRO, and HPCA compared RISC-V implementations against processors from Intel Corporation, AMD, Arm Ltd., and academic designs from Stanford University and MIT. Benchmarks used included SPEC CPU suites, embedded benchmarks such as CoreMark, and workload characterizations appearing in ACM SIGMETRICS and IEEE Transactions on Computers. Performance trade-offs analyzed pipeline depth, branch prediction techniques akin to TAGE predictor research, cache hierarchies influenced by Intel Core designs, and vectorization strategies similar to ARM NEON and Intel AVX. Power and energy efficiency studies referenced measurement methods from IEEE Journal of Solid-State Circuits and collaborations with fabrication partners like TSMC.

Licensing, Governance, and Industry Impact

Licensing decisions used permissive models related to BSD license and Apache License practices common at University of California, Berkeley and organizations like Apache Software Foundation. Governance transitioned into community stewardship under RISC-V International with participation from companies such as SiFive, Western Digital, NVIDIA, Google (company), Alibaba Group, and academic members including University of California, Berkeley, Massachusetts Institute of Technology, and ETH Zurich. Industry impact influenced supply chain discussions involving TSMC, Samsung Electronics, Intel Corporation, and procurement policies referenced at conferences like CES and Mobile World Congress. The project shaped standards conversations in bodies such as IEEE and collaborations with open source projects hosted on GitHub and supported by foundations including Linux Foundation.

Category:Computer architecture