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complementary metal–oxide–semiconductor

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complementary metal–oxide–semiconductor
NameComplementary metal–oxide–semiconductor
CaptionA modern integrated circuit die utilizing CMOS technology.
Invented1963
InventorsFrank Wanlass, Chih-Tang Sah
CompanyFairchild Semiconductor

complementary metal–oxide–semiconductor. Complementary metal–oxide–semiconductor (CMOS) is a dominant technology for constructing integrated circuits, including microprocessors, SRAM, and other digital logic circuits. Its defining characteristic is the use of both p-type and n-type MOSFETs in a complementary, symmetrical fashion to create logic gates with very low static power consumption. The technology was pioneered at Fairchild Semiconductor by Frank Wanlass and Chih-Tang Sah, and its scalability has driven the progression described by Moore's law.

Overview and basic principles

The fundamental principle of CMOS technology is the complementary pairing of n-channel and p-channel MOSFETs on the same silicon substrate. In a basic CMOS inverter, the two transistors are connected in series between the power supply rails, with their gates tied together. When the input is at a logic high voltage, the n-channel device conducts while the p-channel device is off, pulling the output toward ground. This arrangement ensures that in a steady state, there is no direct current path between V<sub>DD</sub> and ground, minimizing static power dissipation. The technology's compatibility with photolithography and silicon dioxide gate dielectrics made it ideal for mass production by companies like Intel and Texas Instruments.

Fabrication process

CMOS fabrication is a complex sequence of semiconductor device fabrication steps performed on silicon wafers. The process begins with the creation of p–n junctions through techniques like ion implantation and thermal diffusion to form n-wells or p-wells in the substrate. A critical step is the growth of a thin gate oxide layer, historically silicon dioxide, via thermal oxidation. Polysilicon is then deposited and patterned to form the transistor gate electrodes. Subsequent stages involve etching, chemical vapor deposition of interlayer dielectrics, and metallization to create the interconnecting wires, often using aluminum or copper interconnects. Advanced manufacturing at facilities like TSMC and Samsung Electronics employs extreme ultraviolet lithography to define ever-smaller features.

CMOS logic and circuit design

CMOS circuit design leverages the complementary nature of the transistors to build efficient logic families. The basic building block is the CMOS inverter, whose operation forms the basis for more complex gates like the NAND gate and NOR gate. These are constructed by combining networks of nMOS and pMOS transistors; the nMOS network connects the output to ground, while the pMOS network connects it to VDD. Design methodologies, including static CMOS and dynamic logic, are used to optimize for speed, area, and power in devices ranging from application-specific integrated circuits to central processing units designed by ARM Holdings and Advanced Micro Devices. Electronic design automation tools from companies like Cadence Design Systems and Synopsys are essential for modern design.

Applications

CMOS technology is ubiquitous in modern electronics. Its primary application is in digital electronics, forming the core of microprocessors in personal computers from Apple Inc. and servers using Xeon processors, microcontrollers, and digital signal processors. It is also the standard technology for static random-access memory and the peripheral logic in dynamic random-access memory chips produced by Micron Technology. Beyond digital logic, CMOS image sensors, such as those developed by Sony for digital cameras and smartphones, have largely replaced charge-coupled devices. The technology is also foundational for radio-frequency identification tags and various analog circuit components within mixed-signal integrated circuits.

Comparison with other technologies

Historically, CMOS competed with and ultimately supplanted earlier logic families like transistor–transistor logic and emitter-coupled logic. While TTL offered faster switching speeds in early computing systems like the DEC PDP-11, it consumed significantly more static power. NMOS logic, used in early microprocessors like the Intel 8080, was simpler to fabricate but suffered from static power dissipation due to resistor pull-ups. CMOS's near-zero static power consumption gave it a decisive advantage for battery-powered devices and large-scale integration. For very high-speed or specialized applications, technologies like gallium arsenide or modern FinFET structures, which evolved from planar CMOS, are sometimes used.

Advancements and scaling

The advancement of CMOS has been defined by the relentless miniaturization of transistor dimensions, a trend historically guided by the International Technology Roadmap for Semiconductors. Key innovations include the shift from aluminum to copper interconnects to reduce resistivity, the introduction of high-κ dielectric materials like hafnium silicate to replace silicon dioxide, and the adoption of strained silicon to enhance carrier mobility. The transition from planar transistors to three-dimensional FinFET architectures by companies like Intel and GlobalFoundries was critical for continuing scaling. Current research explores post-CMOS technologies, including carbon nanotube field-effect transistors, spintronics, and novel materials explored at institutions like IMEC and the Massachusetts Institute of Technology.

Category:Integrated circuits Category:Digital electronics Category:Semiconductor devices Category:Electronic design