Xe-HPC

Xe-HPC
Name	Xe-HPC
Designer	Intel
Predecessor	Xe-HPG
Process	Intel 4
Application	High-performance computing

Xe-HPC. It is a microarchitecture designed by Intel specifically for the high-performance computing market, representing a significant evolution within the company's broader Xe graphics architecture family. The design aims to deliver extreme-scale computational power for exascale computing and advanced scientific computing workloads. Its development is closely tied to major projects like the Aurora (supercomputer) at Argonne National Laboratory.

Overview

The Xe-HPC architecture, codenamed "Ponte Vecchio" during development, is engineered as a foundational technology for next-generation supercomputer systems. It integrates multiple advanced compute tiles and other specialized tiles using Intel's Foveros and EMIB packaging technologies. This approach allows the architecture to achieve high levels of parallel computing efficiency and memory bandwidth critical for computational fluid dynamics and climate modeling. The design directly supports the goals of initiatives like the United States Department of Energy's Exascale Computing Project.

Architecture

The core building block of the architecture is the Xe Core, which is optimized for both FP64 and lower-precision matrix multiplication operations essential for artificial intelligence and machine learning. Multiple cores are aggregated into larger compute tiles, which are then interconnected with HBM memory stacks and base tiles using 2.5D and 3D packaging. Key innovations include the use of Intel's Xe Link for high-speed connectivity between GPUs and a unified memory hierarchy that incorporates both HBM and pooled memory concepts. This tile-based design draws from principles seen in other chiplet-based processors like AMD's MI300.

Development and History

Development of the architecture was led by Raja Koduri after the formation of the Accelerated Computing Systems and Graphics Group at Intel. The project was officially announced alongside the roadmap for the Aurora (supercomputer) at Argonne Leadership Computing Facility. Major milestones included fabrication on the Intel 4 process node and extensive collaboration with partners like HPE and Cray for system integration. The architecture's first implementation, Ponte Vecchio, faced delays but ultimately began shipping for integration into the Aurora (supercomputer) system, marking a key moment for Intel in the HPC market against competitors like NVIDIA and AMD.

Software and Programming Models

Programming for the architecture is supported through a suite of software tools including the oneAPI industry initiative and its corresponding Data Parallel C++ language. Key low-level drivers and libraries are provided by the Intel oneAPI Base Toolkit and the Intel oneAPI HPC Toolkit, which include optimized versions of OpenMP and MPI for distributed computing. Critical math libraries like the Intel oneAPI Math Kernel Library and frameworks such as SYCL are essential for porting applications from platforms like NVIDIA's CUDA. The software stack is designed for compatibility with major HPC operating systems and schedulers like Slurm Workload Manager.

Performance and Applications

The architecture is targeted at achieving exascale performance for flagship systems, with the Aurora (supercomputer) projected to surpass one exaFLOP. Its performance is particularly suited for complex simulations in fields like nuclear fusion research at laboratories such as Lawrence Livermore National Laboratory, molecular dynamics for drug discovery, and cosmological simulation for projects like the Large Synoptic Survey Telescope. Benchmarks often focus on traditional HPC codes like HPL and newer AI workloads, competing with systems based on NVIDIA's Grace Hopper Superchip and AMD's Instinct MI300A.

Future Developments

Future iterations of the architecture are expected to leverage subsequent process nodes like Intel 3 and Intel 20A, potentially integrating more advanced packaging such as Foveros Direct. The architectural concepts are likely to influence other products within the broader Xe family, including datacenter GPUs like the successor to Intel Data Center GPU Max Series. Long-term development will focus on improving energy efficiency for green computing and enhancing support for converged HPC and AI workloads, aligning with global trends in supercomputing as seen in roadmaps from Fujitsu and EuroHPC.

Category:Intel microarchitectures Category:Graphics processing units Category:High-performance computing