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Socket P

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Article Genealogy
Parent: Celeron Hop 4
Expansion Funnel Raw 39 → Dedup 0 → NER 0 → Enqueued 0
1. Extracted39
2. After dedup0 (None)
3. After NER0 ()
4. Enqueued0 ()
Socket P
NameSocket P
TypePGA-ZIF
ChipformFlip-chip
Contacts478
Fsb400 MT/s, 533 MT/s, 667 MT/s, 800 MT/s, 1066 MT/s
PredecessorSocket M
SuccessorSocket G1, Socket G2

Socket P. It is a microprocessor socket designed by Intel for its mobile platform, introduced in May 2007 as part of the Santa Rosa platform refresh. The socket was the foundation for the company's Core 2 Duo and Core 2 Quad mobile processors, marking a significant step in performance and power efficiency for laptops. It succeeded the earlier Socket M and was itself eventually replaced by newer interfaces as part of the Nehalem and subsequent architectures.

Overview

Introduced alongside the Centrino brand's Santa Rosa platform, Socket P represented a pivotal update for mobile computing. The socket was engineered to support the new Penryn family of processors, which were fabricated on a 45-nanometer process. This launch was a key component of Intel's strategy to enhance performance-per-watt, a critical metric for the growing notebook market. The platform's development was closely tied to advancements in chipset technology, notably the Mobile Intel 965 Express chipset family.

Technical specifications

Socket P is a 478-pin, zero insertion force (ZIF) interface using a flip-chip pin grid array (FC-PGA) package. It officially supported front-side bus speeds ranging from 400 MT/s up to 1066 MT/s, accommodating a wide performance spectrum. The socket maintained mechanical compatibility with its predecessor, Socket M, but was electrically incompatible, preventing direct processor swaps. Key supporting technologies for processors in this socket included Intel 64, Execute Disable Bit, and enhanced SpeedStep technology for dynamic power management.

Supported processors

The primary processors for Socket P were based on the Core microarchitecture and the enhanced 45nm Penryn design. This included the entire mobile lineup of Core 2 Duo processors, such as the Merom and Penryn dual-core variants, and select high-end Core 2 Quad chips like the Penryn QC. It also supported budget-oriented Celeron and Pentium Dual-Core mobile processors, extending its reach across various market segments. These CPUs were integral to systems branded under the Centrino Duo and Centrino 2 banners.

Platform compatibility

Socket P was a central component of the Santa Rosa and later Montevina (Centrino 2) mobile platforms. It was paired with the Mobile Intel 965 Express chipset family (codenamed Crestline), which included the PM965, GM965, and GL960 chipsets. This combination supported crucial contemporary technologies like PCI Express, Serial ATA, and Intel High Definition Audio. The platform also facilitated the adoption of DDR2 SDRAM memory and newer wireless standards like Wi-Fi as part of the Centrino specification, providing a complete system solution for OEMs such as Dell, HP, Lenovo, and Toshiba.

Market impact and successor

Socket P enjoyed a long and successful lifespan in the mobile market, providing the backbone for a vast range of consumer and business notebooks from 2007 into 2009. Its support for powerful Core 2 Quad processors even enabled some of the earliest high-performance mobile workstations and gaming laptops. It was ultimately succeeded by Socket G1 (also known as rPGA988A) for the initial Nehalem-based Core i7 and Core i5 mobile processors, and later by Socket G2 for the Sandy Bridge generation. This transition moved the platform to an integrated memory controller and QuickPath Interconnect, rendering Socket P and its front-side bus architecture obsolete.

Category:Intel CPU sockets Category:Computer hardware