Peripheral Component Interconnect

Peripheral Component Interconnect
Jonathan Zander · CC BY-SA 3.0 · source
Name	Peripheral Component Interconnect
Caption	Typical 32-bit PCI slots on a motherboard
Invent-date	1992
Invent-name	Intel
Superseded-by	PCI Express
Width	32 or 64 bits

Peripheral Component Interconnect. It is a local computer bus standard for attaching hardware devices inside a personal computer, first introduced by Intel in 1992. The specification defined a common expansion slot architecture that became ubiquitous on motherboards for connecting components like network cards, sound cards, and graphics cards. It served as a high-speed parallel bus that largely replaced older standards like ISA and VLB, enabling improved performance and Plug and Play configuration for the IBM PC compatible ecosystem.

History and development

The development was spearheaded by a team at Intel led by engineer Dennis Carter, with the first official specification released in 1992. It was created to address the performance bottlenecks and configuration difficulties of the prevailing ISA and the short-lived VESA Local Bus (VLB) used primarily for graphics cards. A key industry consortium, the PCI Special Interest Group (PCI-SIG), was formed to manage and evolve the standard, with founding members including Intel, IBM, Compaq, and DEC. Its adoption was accelerated by its inclusion in Intel's Pentium processor platform and its endorsement by major operating system vendors like Microsoft for its Windows 95 Plug and Play features.

Technical specifications

The original specification defined a 32-bit parallel bus operating at 33 MHz, yielding a peak theoretical bandwidth of 133 MB/s. It supported both 5-volt and 3.3-volt signaling, with a physical keying system in the connector to prevent incorrect card insertion. The bus protocol used a shared, multi-drop topology where multiple devices shared the same set of address/data lines, controlled by a central bus master typically located in the chipset. Key features included burst mode data transfers, comprehensive configuration space for Plug and Play, and support for both IRQ steering and DMA.

Variants and generations

Several major variants were standardized to extend its utility. PCI-X, developed by IBM, HP, and Compaq, doubled the bus width to 64 bits and increased clock speeds to 133 MHz, achieving 1066 MB/s, primarily for servers and workstations. A compact form factor, Mini PCI, was introduced for integrated peripherals in laptop computers. The most significant evolutionary step was PCI Express, a serial point-to-point interconnect that began to replace the parallel bus in 2004. Earlier, a transitional standard for mobile computing called CardBus was based on its electrical specifications.

Architecture and operation

The architecture is synchronous, with all transactions tied to the central bus clock. Communication is initiated by an initiator (or master) and targeted at a specific device based on addresses mapped into the system's memory address space or I/O port space. A central arbitration scheme managed access to the bus, preventing collisions. Each device contained a 256-byte configuration space, accessed via a separate mechanism, which held information like vendor ID (e.g., from Intel or AMD), device ID, and assigned system resources, which was crucial for the BIOS and operating system during the Plug and Play enumeration process.

Applications and adoption

It became the dominant expansion bus throughout the 1990s and early 2000s, found in virtually all PCs, Apple Power Macintosh computers, and many workstations from companies like Sun Microsystems. Typical adapter cards included Ethernet network cards from 3Com, Creative's Sound Blaster sound cards, and a wide array of SCSI and RAID controllers for storage. Its reliability and performance also made it a common choice for embedded systems and industrial computers, with form factors like PC/104 adapting the standard for specialized applications.

Legacy and successors

Its legacy is profound, having established critical paradigms for device enumeration and configuration that influenced all subsequent bus designs. It was officially superseded by the serial PCI Express (PCIe) standard, also managed by the PCI Special Interest Group, which offered vastly superior scalable bandwidth through dedicated lanes. However, slots remained common on motherboards for over a decade alongside PCI Express for legacy support. Derivatives of its core concepts can be found in later interconnects like HyperTransport (used by AMD) and Intel's Direct Media Interface, and it remains in use in many legacy and embedded systems worldwide. Category:Computer buses Category:Computer hardware standards Category:Intel