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| Sycamore processor | |
|---|---|
| Name | Sycamore processor |
| Designer | |
| Manufacturer | IBM |
| Introduced | 2019 |
| Process | 28 nm |
| Cores | 54 qubits |
| Type | Quantum processor |
| Operating system | None |
Sycamore processor is a superconducting quantum processor developed by Google's Quantum AI team and demonstrated in 2019 as part of a high-profile experiment involving computational tasks claimed to exceed classical supercomputer capabilities. The processor and the associated experiment drew attention from institutions including NASA, IBM, University of California, Berkeley, University of Oxford, and California Institute of Technology and became a focal point in debates within the quantum computing community including groups at MIT and Microsoft Research.
The project emerged from collaborations among engineers and researchers linked to Google, DARPA, National Science Foundation, U.S. Department of Energy, and academic partners such as Princeton University and Stanford University. Key personnel associated with the work published papers and preprints alongside figures from Google Research and contributors from University of California, Santa Barbara. The initiative built on prior developments at institutions like Yale University, IBM Research, Rigetti Computing, D-Wave Systems, and Intel Corporation, and referenced theoretical frameworks from authors connected to MIT and Caltech.
Sycamore employed a two-dimensional lattice of fixed-frequency superconducting qubits fabricated using technologies developed in part at IBM Thomas J. Watson Research Center and informed by designs from Yale School of Engineering, Harvard University, and Columbia University. The device used Josephson junctions and microwave control electronics similar to systems produced by teams at Rigetti Computing and Intel Labs. Cryogenic components were compatible with dilution refrigerators used at National Institute of Standards and Technology and University of Maryland. Readout and control systems referenced techniques from researchers at NIST, Los Alamos National Laboratory, and Argonne National Laboratory. The chip layout echoed connectivity considerations debated at Los Alamos National Laboratory and optimized with input from collaborators at Lawrence Berkeley National Laboratory.
The 2019 demonstration, announced by Google in a paper with co-authors from Google Research and collaborators at NASA Ames Research Center and NSF-funded groups, claimed that Sycamore executed a sampling task in approximately 200 seconds that would take the fastest classical supercomputer weeks. The claim provoked responses from teams at IBM Research, which contested resource estimates citing systems at LLNL and Oak Ridge National Laboratory, and from researchers at ETH Zurich and University of Tokyo who explored alternative classical algorithms. The episode prompted commentary from science outlets tied to Nature (journal), Science (journal), and newspapers such as the New York Times and the Wall Street Journal and spurred follow-up analyses at Princeton University and MIT.
Benchmarks reported gate fidelities and single- and two-qubit error rates compared against contemporary platforms like devices at IBM, Rigetti, and IonQ. Reported metrics referenced randomized benchmarking techniques practiced at Yale University, UCSB, and Caltech labs, with two-qubit entangling gate fidelities reaching thresholds discussed in literature from Harvard and Stanford. Comparative evaluations involved simulation resources at Oak Ridge National Laboratory and algorithmic optimizations from teams at Lawrence Livermore National Laboratory and Argonne, while skeptics invoked improvements in classical sampling algorithms developed at ETH Zurich and University of Waterloo.
Development tools for Sycamore experiments integrated with software stacks and frameworks influenced by projects at Google such as Cirq and research tools similar to those at IBM Quantum, Qiskit, QuTiP from University of New Mexico-linked researchers, and middleware approaches from Microsoft Quantum (Q#). Job orchestration and calibration procedures leveraged methods reported in publications from Caltech, MIT, and Princeton University, and used cloud-oriented workflows like those discussed by teams at Amazon Web Services and Microsoft Azure research groups collaborating with national labs such as Argonne National Laboratory.
Critics pointed to decoherence, crosstalk, calibration overhead, and error rates that limited practical utility for applications beyond specific sampling tasks, citing work from IBM Research, Rigetti Computing, IonQ, NIST, and academic groups at University of Innsbruck and University of Vienna. Discussions referenced scalability concerns also highlighted by researchers at Intel, MIT, Harvard, and Princeton University, and policy analysts at Brookings Institution and RAND Corporation noted implications for research funding and commercialization. The initial supremacy claim stimulated methodological critiques published in venues involving contributors from ETH Zurich, University of Toronto, and University of Waterloo.
Following Sycamore, research directions at Google and partner institutions including Stanford University, Harvard University, MIT, and Caltech pursued larger qubit arrays, error mitigation, and fault-tolerant architectures influenced by theory groups at Perimeter Institute and Institute for Quantum Computing. Competing programs at IBM, Rigetti, IonQ, Honeywell, and Alibaba Group continued hardware diversification with superconducting, trapped-ion, and photonic approaches championed by teams at University of Oxford and University of Science and Technology of China. International collaborations involving European Commission initiatives and projects funded by Horizon 2020 and agencies like DARPA and NSF aim to evolve designs toward logical qubits and error-corrected systems, with applied research groups at Lawrence Berkeley National Laboratory and Oak Ridge National Laboratory contributing to benchmarks.
Category:Quantum processors