Silicon-on-insulator

Silicon-on-insulator
Name	Silicon-on-insulator
Caption	Cross-section schematic of an SOI wafer
Type	Semiconductor fabrication technology
Substrate	Silicon
First used	1970s
Manufacturers	GlobalFoundries; Intel; TSMC; STMicroelectronics; Soitec

Silicon-on-insulator is a semiconductor fabrication technology that uses a layered silicon–insulator–silicon substrate to improve electronic performance, reduce parasitic capacitance, and enable new device architectures. Developed amid advances in semiconductor materials research, materials science, and microfabrication, the approach has influenced integrated circuit design in firms, foundries, and research institutions across the world. SOI intersects with work from corporations, national laboratories, and universities in fields driven by Moore's Law, nanotechnology, and power-efficient computing.

History

Early concepts for buried dielectric layers in silicon emerged from wartime and postwar sensor research, with experimental efforts in the Bell Labs era and exploratory studies at institutions like Massachusetts Institute of Technology and Stanford University. Research intensified during the 1970s and 1980s alongside projects at Bell Labs, Hewlett-Packard, and IBM, where prototypes leveraged innovations tied to the Intel 4004 generation and subsequent roadmaps. Commercial momentum grew in the 1990s as companies including Soitec, STMicroelectronics, and AMD invested in wafer technologies influenced by roadmap discussions at the International Technology Roadmap for Semiconductors and collaborations with consortia such as the Semiconductor Research Corporation. Adoption accelerated in the 2000s with production nodes driven by Intel and GlobalFoundries, while research labs at University of California, Berkeley, IMEC, and CERN explored SOI for microelectronics and particle-detection applications.

Technology and types

SOI encompasses multiple substrate types, notably thin-film and thick-film configurations developed by firms like Soitec and production lines at TSMC. Principal varieties include partially depleted SOI and fully depleted SOI, each tied to device physics examined in studies originating at Bell Labs and M.I.T.. Variants include silicon-on-sapphire used historically by Hughes Aircraft Company for radiation-hardened circuits and silicon-on-glass investigated within programs at NASA for space electronics. Specialized derivatives such as ultra-thin-body SOI and wafer-bonded SOI relate to techniques pioneered by researchers at Stanford University and CEA-Leti. The technology connects to architectures promoted by companies like ARM Holdings for low-power mobile processors and used within platforms developed by Apple Inc. supply chains.

Fabrication methods

Key fabrication routes include separation by implantation of oxygen (the SIMOX process), developed through collaborations involving Rockwell International and academic partners, and wafer bonding and layer transfer approaches refined by Soitec and industrial research centers such as IMEC. Other methods—like epitaxial growth and localized oxidation—were advanced in joint projects at Corning Incorporated and National Institute of Standards and Technology. Process integration in production fabs at TSMC, GlobalFoundries, and Intel aligns with lithography nodes influenced by ASML tool developments and metrology from KLA Corporation. Quality control and defect-reduction strategies reflect standards studied in programs funded by the European Commission and agencies like the U.S. Department of Energy.

Device architectures and applications

SOI enables transistor variants and circuits used in microprocessors, radio-frequency components, and sensors. Microprocessor implementations from Intel and microcontroller designs at STMicroelectronics exploited SOI for speed and thermal benefits, while Qualcomm and Broadcom integrated SOI-derived RF front ends. Specialized detectors and readout electronics for experiments at CERN and space instruments developed by ESA have used SOI substrates for radiation tolerance, drawing on partnerships with institutes such as University College London and Rutherford Appleton Laboratory. SOI underpins nanophotonics research at Caltech and Bell Labs and power devices in collaborations involving Infineon Technologies and ON Semiconductor. Emerging uses include silicon photonics efforts by Xilinx collaborators and quantum device research at MIT and University of Oxford.

Advantages and limitations

Advantages include reduced parasitic capacitance and leakage that benefit high-speed logic and low-power designs as demonstrated in products from Intel and AMD, and improved radiation hardness exploited by Lockheed Martin and Northrop Grumman for aerospace systems. Thermal management and self-heating issues were characterized by studies at IBM Research and IMEC, revealing trade-offs in heat dissipation for ultra-thin devices. Limitations involve cost premiums relative to bulk silicon noted in manufacturing analyses from McKinsey & Company and supply-chain constraints tied to Soitec capacity and wafer bonding yield, challenges addressed in cooperative programs with DARPA and industrial consortia. Scaling to advanced nodes requires coordination with lithography advances from ASML and materials work at Tokyo Electron and Applied Materials.

Market and industry adoption

Market adoption reflects platform choices by major foundries and fabless firms; Intel and STMicroelectronics incorporated SOI in product lines, while TSMC and GlobalFoundries offered select SOI services driven by customer demand from Qualcomm and other semiconductor clients. The SOI supply chain involves specialists like Soitec supplying wafers, equipment vendors such as Applied Materials and Lam Research, and testing services provided by laboratories at National Semiconductor subsidiaries and university spinouts. Industry roadmaps from the Semiconductor Industry Association and procurement programs at agencies like NASA and the U.S. Air Force influence adoption cycles, with continued research funded through partnerships among European Space Agency, Japan Aerospace Exploration Agency, and corporate R&D groups at Samsung Electronics and Sony Corporation.

Category:Semiconductor_device_fabrication