MOSIS

MOSIS
Name	MOSIS
Type	Fabrication service
Founded	1981
Founder	Danny Cohen; originated at University of Southern California Information Sciences Institute
Headquarters	Los Angeles
Industry	Semiconductor fabrication service

MOSIS

MOSIS is a multi-project wafer fabrication service that aggregated integrated circuit designs from universities, research institutions, and small companies to produce low-cost prototype and small-volume production chips. The service connected academics and startups to commercial and research foundries, enabling rapid iteration for digital, analog, and mixed-signal designs. It played a central role in the diffusion of microelectronics research from labs such as Massachusetts Institute of Technology, Stanford University, and University of California, Berkeley to industry partners including Intel, Texas Instruments, and Xerox PARC.

Overview

MOSIS provided a shared manufacturing pipeline where multiple distinct chip designs were tiled onto a single wafer run to amortize mask and processing costs across participants. The platform linked design groups at institutions such as Carnegie Mellon University, California Institute of Technology, University of Michigan, Georgia Institute of Technology, and Princeton University to foundries and backend services like Taiwan Semiconductor Manufacturing Company, GlobalFoundries, and legacy fabs associated with Fairchild Semiconductor. MOSIS expedited prototype cycles for projects associated with awardees of the National Science Foundation, contractors for Defense Advanced Research Projects Agency, and collaborators from companies like IBM and HP Labs. The service supported education and research workflows at organizations such as Stanford Linear Accelerator Center, Lawrence Berkeley National Laboratory, and Jet Propulsion Laboratory.

History and Development

The concept for MOSIS emerged in the late 1970s and early 1980s to address high mask and wafer costs faced by academic researchers at institutions like University of Southern California and Massachusetts Institute of Technology. Early adopters included research groups led by figures affiliated with DARPA programs and technology centers such as Xerox PARC and Bell Labs. MOSIS evolved through partnerships with fabrication facilities tied to companies like Intel and Motorola Semiconductor, and through coordination with government-funded initiatives at the National Science Foundation and Defense Advanced Research Projects Agency. Over decades it adapted to shifts in process nodes pioneered by fabs associated with Texas Instruments, AMD, and foundries in Hsinchu Science Park, responding to scaling trends driven by the community surrounding the International Technology Roadmap for Semiconductors. Key historical milestones intersected with projects at research hubs like MIT Media Lab, Yale University, and Brown University.

Services and Technology

MOSIS offered services including mask data preparation, wafer fabrication runs, dicing, die sorting, and packaging coordination, interfacing design flows from electronic design automation vendors used at centers like Cadence Design Systems and Synopsys. The service accommodated process design kits and design rules from fabs associated with TSMC, GlobalFoundries, and legacy partners such as Intel and IBM Microelectronics, enabling compatibility with standard cell libraries and memory macros used by groups at University of Illinois Urbana–Champaign and Cornell University. MOSIS supported prototyping for digital architectures, analog ICs, RF designs, and MEMS work from laboratories such as Caltech, Dartmouth College, and Rochester Institute of Technology, and integrated with packaging suppliers working with companies like Amkor Technology. Its workflows intersected with testing and verification resources at facilities associated with Sandia National Laboratories and Los Alamos National Laboratory.

Impact on Semiconductor Design and Education

MOSIS lowered barriers for students and researchers at institutions including Stanford University, MIT, UC Berkeley, Georgia Tech, and Princeton University to fabricate chips, catalyzing educational programs such as university microelectronics courses and senior capstone curricula. The availability of affordable prototypes accelerated research dissemination from labs like Bell Labs Innovations and Xerox PARC into startups and industrial labs including Fairchild Semiconductor alumni ventures. MOSIS-supported projects contributed to milestones in processor research and network-on-chip experiments carried out at Carnegie Mellon University and University of Michigan, and enabled hardware demonstrators for grant-funded efforts from agencies like NSF and DARPA. The service influenced workforce development feeding companies such as Intel, AMD, Qualcomm, and NVIDIA.

Organizational Structure and Funding

Initially hosted at the University of Southern California Information Sciences Institute and formed with participation from entities such as RAND Corporation and university consortia, MOSIS operated as a service organization coordinating academic orders, foundry schedules, and packaging vendors. Funding and support historically came from federal research agencies including National Science Foundation and Defense Advanced Research Projects Agency, cost-sharing by participating universities like University of California campuses, and fee-for-service revenue from startups and industrial research labs including Hewlett-Packard and IBM. Governance and operational partnerships involved collaborations with regional technology clusters such as Silicon Valley institutions and manufacturing hubs in Hsinchu and Siem Reap-adjacent research networks.

Notable Projects and Collaborations

MOSIS facilitated high-profile prototypes and collaborative programs at institutions like Stanford University (processor and ASIC research), MIT (neuromorphic and VLSI circuits), UC Berkeley (RISC processor prototypes), Carnegie Mellon University (network-on-chip), and Caltech (analog and MEMS). It supported industry-academic transitions involving companies such as Intel, Texas Instruments, AMD, Qualcomm, and research partnerships with national labs including Lawrence Livermore National Laboratory. International collaborations reached design groups in Japan, South Korea, and Taiwan, linking universities such as University of Tokyo, Seoul National University, and National Tsing Hua University with fabrication ecosystems associated with TSMC and Samsung Electronics.

Category:Semiconductor fabrication services