Level-1 trigger (ATLAS)

Level-1 trigger (ATLAS)
Name	Level-1 trigger (ATLAS)

Level-1 trigger (ATLAS) is the first-stage hardware trigger system used by the ATLAS experiment at the Large Hadron Collider to reduce the 40 MHz bunch-crossing rate to an acceptably low rate for the downstream High-Level Trigger and Data Acquisition systems. It provides a fast, coarse decision based on information from the ATLAS calorimeter, the ATLAS muon spectrometer, and timing delivered by the LHC RF system, interfacing with global services such as the CERN timing, trigger and control infrastructure. The Level-1 trigger's role is critical for physics programs ranging from searches associated with the Higgs boson and supersymmetry to precision measurements involving the Top quark and B physics.

Overview

The Level-1 trigger sits between the ATLAS front-end electronics and the Event Filter/High-Level Trigger, operating within the ATLAS detector environment in parallel with systems used by CMS and other LHC experiments. It accepts events using separate calorimeter and muon trigger paths, coordinating with the ATLAS TDAQ partitioning and the Worldwide LHC Computing Grid workflows for accepted events. The decision logic must accommodate inputs influenced by accelerator conditions such as the LHC Run 1, LHC Run 2, and LHC Run 3 schedules and integrate with commissioning campaigns tied to the CERN Proton Synchrotron.

Hardware and Architecture

The Level-1 hardware comprises bespoke electronics and commercial components housed in the ATLAS cavern and service areas, including the ATLAS USA and ATLAS Tier-1 centers for support. Key subsystems include the Level-1 Calorimeter Trigger, the Level-1 Muon Trigger, the Central Trigger Processor, and the Timing, Trigger and Control distribution. Implementation uses technologies developed by collaborations involving institutions such as University of Oxford, Brookhaven National Laboratory, CERN engineering groups, and the Max Planck Society. FPGA-based processing cards, custom backplanes, optical links from vendors used by experiments like LHCb and ALICE, and crate systems inspired by standards such as VME and ATCA are integrated to meet the constraints set by the ATLAS upgrade planning boards.

Trigger Algorithms and Data Flow

Algorithms implemented in firmware perform regional energy sums, sliding-window cluster finding, and muon candidate pattern recognition, drawing on designs tested in prototype campaigns with groups from University of California, Berkeley, University of Manchester, ETH Zurich, and INFN. The calorimeter path aggregates trigger towers from the Liquid Argon Calorimeter and Tile Calorimeter into transverse energy objects, while the muon path uses coincidence logic across chambers like the Monitored Drift Tubes and Resistive Plate Chambers to identify transverse momentum thresholds. The Central Trigger Processor applies programmable menus to combine multiplicity and topological conditions influenced by studies reported at conferences such as the International Conference on High Energy Physics and sessions of the European Physical Society. Data flow employs dense optical fibers compatible with systems used by ATLAS Forward Proton and synchronizes via the LHC Clock and signals used in Beam Conditions Monitor operations.

Timing, Latency, and Performance

Design constraints enforce a fixed decision latency budget determined by buffer depths in the front-end electronics, a requirement coordinated with timing teams from CERN and the ATLAS Electronics and Sensors Group. Typical latency targets, adjusted across Run 1 and Run 2 periods, balanced physics acceptance for signatures like high-pT jets, isolated leptons from Z boson decays, and missing transverse energy associated with dark matter searches. Performance metrics include dead-time fractions, trigger efficiencies validated using control samples involving the W boson and J/ψ resonances, and rate stability under pile-up scenarios observed during fills at Interaction Point 1.

Calibration, Monitoring, and Commissioning

Calibration procedures used pulser systems, laser injection into calorimeters, and cosmic-ray runs coordinated with groups such as ATLAS Collaboration working groups and participating laboratories including SLAC National Accelerator Laboratory and TRIUMF. Monitoring relied on online run control displays, histogramming services developed alongside tools used by CERN OpenLab, and diagnostics from subsystem experts at institutions like KEK and DESY. Commissioning phases encompassed pre-beam integration tests, first-beam checks, and progressively stringent validation campaigns reported in ATLAS Technical Design Report-style documents and internal notes.

Upgrades and Run-era Developments

Upgrades addressed increasing luminosity and pile-up anticipated for High-Luminosity LHC operations, with developments coordinated in upgrade consortia including members from Imperial College London, University of Chicago, Fermilab, and European partners such as CEA Saclay. Enhancements involved higher-granularity trigger primitives, new FPGA families, optical link upgrades compatible with GBT and transceiver technologies used by LHCb upgrade projects, and introduction of topological processors to enable complex selections inspired by algorithms used in machine-learning studies at facilities like CERN IT. These developments were staged across long shutdowns like LS1 and LS2 and continue in preparation for HL-LHC commissioning campaigns.

Category:ATLAS experiment