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| LPDDR4X | |
|---|---|
| Name | LPDDR4X |
| Developer | JEDEC |
| Introduced | 2017 |
| Type | Mobile DRAM |
| Predecessor | LPDDR4 |
| Successor | LPDDR5 |
| Voltages | 0.6–1.1 V |
| Data rate | up to 4266 MT/s |
| Channels | dual channel |
LPDDR4X LPDDR4X is a low-power double data rate dynamic random-access memory standard optimized for mobile and embedded platforms. It was standardized by the JEDEC Solid State Technology Association to reduce I/O voltage and improve energy efficiency for smartphones, tablets, and ultralight laptops. LPDDR4X builds on prior work in mobile memory and interfaces with system-on-chip vendors, memory manufacturers, and OEMs across the consumer electronics and embedded computing industries.
LPDDR4X emerged through industry collaboration among JEDEC, semiconductor firms such as Samsung Electronics, SK Hynix, Micron Technology, and device integrators including Apple Inc., Qualcomm, Huawei, and MediaTek. The specification targets platforms designed by firms like Intel Corporation and AMD for thin-and-light notebooks and by SoC designers such as NVIDIA and Broadcom. The initiative followed market shifts initiated by earlier standards from organizations like SD Association and efforts led by trade shows such as Mobile World Congress.
LPDDR4X defines electrical, timing, and signaling parameters coordinated with standards development at JEDEC and influenced by companies including Samsung Electronics, SK Hynix, Micron Technology, Nanya Technology, and Winbond. Key numeric details align with data rates pioneered by memory roadmap discussions at MIPI Alliance events and semiconductor roadmaps from TSMC and GlobalFoundries. Specifications include dual 16-bit channels per package similar to proposals seen at ARM Holdings architecture briefings and timing modes relevant to controllers from Cadence Design Systems and Synopsys.
Architectural choices in LPDDR4X reflect collaboration between IP providers like ARM Holdings and DRAM fabs such as Samsung Electronics and SK Hynix. The design leverages a pseudo-open drain I/O and lower I/O voltage derived from research at institutions such as IMEC and test collaborations with fabs at TSMC. Features include bank-grouping strategies influenced by earlier memory designs championed by teams at Micron Technology and address mapping schemes used by SoC architects at Qualcomm and Apple Inc..
LPDDR4X improves power efficiency by lowering I/O voltage, a direction supported by power management designs from Texas Instruments and Analog Devices. Performance metrics—measured in megatransfers per second—reflect engineering targets set by system integrators including Samsung Electronics, LG Electronics, Sony Corporation, and Xiaomi. Energy per bit reductions were evaluated in lab comparisons led by university research groups at MIT, Stanford University, and University of California, Berkeley in collaboration with corporate labs at Intel Corporation.
Comparisons to LPDDR3, LPDDR4, and LPDDR5 are common in analyses by industry analysts at Gartner, IDC, IHS Markit, and consultancies such as McKinsey & Company. LPDDR4X’s lower I/O voltage contrasts with DDR4 used in servers from vendors like Dell Technologies, Hewlett Packard Enterprise, and Lenovo Group Limited. The standard’s tradeoffs were debated at technical sessions hosted by IEEE and technical committees involving firms such as Cadence Design Systems and Synopsys.
Adoption was driven by memory manufacturers including Samsung Electronics, SK Hynix, Micron Technology, Nanya Technology, Winbond, and Powerchip Technology. Device launches by companies such as Apple Inc. (in smartphones), Google (in devices), Samsung Electronics (in flagship phones), and laptop makers like ASUS and Acer Inc. accelerated market uptake. Market analysis reports by Gartner, IDC, and IHS Markit tracked shipments and foundry partnerships with TSMC, GlobalFoundries, and packaging partners like ASE Technology Holding.
LPDDR4X saw integration in flagship smartphones from Samsung Electronics, Apple Inc., Huawei, Xiaomi, and OnePlus as well as tablets by Microsoft Corporation and thin laptops by Lenovo Group Limited, HP Inc., and Dell Technologies. Integration workflows involved SoC vendors such as Qualcomm, MediaTek, Samsung Electronics (Exynos teams), and Apple Inc. (A-series and M-series teams). OEM design houses and ODMs like Foxconn and Quanta Computer handled system integration, testing, and supply chain coordination with logistics firms like DHL and Kuehne + Nagel.
The successor standard, LPDDR5, matured through JEDEC processes with participation from Samsung Electronics, SK Hynix, Micron Technology, and system architects at Qualcomm, Apple Inc., and MediaTek. Ongoing research at consortia including IMEC, Tyndall National Institute, and university groups at MIT and Stanford University explores advanced low-power signaling, 3D stacking, and next-generation packaging techniques used by fabs such as TSMC and Samsung Foundry. Industry forecasting by firms like Gartner and IDC predicts continued migration to LPDDR5 and beyond for high-performance mobile platforms distributed by Samsung Electronics, Apple Inc., Google, and PC vendors including Lenovo Group Limited.
Category:Computer memory standards