Generated by GPT-5-mini| International Roadmap for Devices and Systems | |
|---|---|
| Name | International Roadmap for Devices and Systems |
| Abbreviation | IRDS |
| Established | 2016 |
| Predecessor | International Technology Roadmap for Semiconductors |
| Field | Semiconductor devices; computing; packaging |
| Governing body | IEEE; SEMI; JEITA |
International Roadmap for Devices and Systems The International Roadmap for Devices and Systems is an industry-led strategic framework guiding semiconductor device evolution, packaging, and system integration. It synthesizes projections from consortiums and standards bodies to align research, manufacturing, and supply-chain objectives across multinational corporations and research institutions. The roadmap coordinates milestones that inform capital investment decisions, collaborative programs, and public–private partnerships across technology hubs in Asia, Europe, and North America.
The roadmap aggregates input from major stakeholders including IEEE, SEMI, JEITA, ACM, SRC, and national laboratories such as Argonne National Laboratory, Lawrence Berkeley National Laboratory, and Sandia National Laboratories. It addresses device scaling, heterogeneous integration, and system-level metrics influenced by corporations like Intel, TSMC, Samsung Electronics, GlobalFoundries, and Micron Technology. Academic contributors from institutions such as Massachusetts Institute of Technology, Stanford University, University of Cambridge, Tsinghua University, and ETH Zurich feed technology forecasts into the roadmap, while standards organizations such as ISO, IEC, and IEEE Standards Association help translate targets into testable specifications.
The IRDS evolved from the International Technology Roadmap for Semiconductors initiative, reformulated amid shifts in industry structure including consolidation at AMD, strategic moves by NVIDIA, and foundry-model expansion at TSMC. Governance is managed via steering committees composed of representatives from trade associations like SEMI, research consortia like IMEC, and government agencies including DARPA, European Commission, and METI. Annual workshops and plenary meetings occur alongside conferences such as International Electron Devices Meeting, Design Automation Conference, and Hot Chips, where working groups produce updates coordinated with global roadmaps such as Horizon Europe initiatives and bilateral research agreements (for example, accords between United States Department of Energy labs and Riken).
Key objectives align with Moore-era scaling transitions, aiming to balance device miniaturization with alternatives like multi-die integration and advanced packaging championed by Intel and TSMC. The roadmap emphasizes materials innovation involving graphene, molybdenum disulfide, III–V semiconductors, and high-k dielectrics researched at IMEC, Cea-Leti, and NIMS. Power-efficiency and performance targets reference workloads from datacenter operators such as Google, Amazon Web Services, and Microsoft Azure, and application domains including 5G NR, autonomous vehicles developed by Waymo and Tesla, and edge compute platforms promoted by Arm Holdings. Supply-chain resilience and manufacturing objectives reflect experiences from events like the COVID-19 pandemic and geopolitical shifts involving United States–China trade relations.
The roadmap delineates priority domains: high-performance computing linked to Oak Ridge National Laboratory initiatives and Exascale computing, mobile and consumer electronics driven by Apple Inc. and Samsung Electronics, automotive semiconductor needs from Bosch and NXP Semiconductors, and aerospace/defense requirements tied to Lockheed Martin and Northrop Grumman. Emerging application areas include neuromorphic computing promoted by IBM Research, quantum-compatible device interfaces linked to Google Quantum AI and IonQ, and sensors for the Internet of Things prioritized by Qualcomm and STMicroelectronics. Cross-cutting programs involve packaging consortia such as Chiplets ecosystems and collaborative efforts like Manufacturing USA institutes.
IRDS defines metrics for device performance, power, area, and cost that inform benchmarking suites used by industry labs and academia, complementing suites from SPEC, MLPerf, and EEMBC. Process technology nodes and yield metrics reference methodologies from SEMI and attribution schemes aligned with ISO standards. Reliability, safety, and security benchmarks incorporate standards from SAE International for automotive functional safety and NIST publications for supply-chain cybersecurity. Collaboration with testing laboratories such as UL and certification bodies like Underwriters Laboratories helps translate roadmap goals into test procedures adoptable by fabs and packaging houses, including those operated by UMC and SMIC.
The roadmap highlights unresolved scientific and engineering challenges: novel device architectures studied at Bell Labs, defect control researched at Sandia National Laboratories, and interconnect limits explored by Cornell University. Scaling beyond conventional CMOS prompts research into spintronics from University of California, Berkeley, photonic integration at Caltech, and heterogeneous integration models advanced by GlobalFoundries and Intel. Workforce development and education initiatives tie into programs at National Science Foundation and universities to sustain talent pipelines. Future directions anticipate convergence with initiatives such as European Chips Act, expanded international research collaborations with Japan Science and Technology Agency, and continued alignment with commercial strategies from firms like Broadcom and Analog Devices.
Category:Semiconductor industry roadmaps