Generated by GPT-5-mini| Intel 82371EB | |
|---|---|
| Name | Intel 82371EB |
| Caption | Intel 82371EB southbridge component |
| Manufacturer | Intel |
| Family | PIIX4 family |
| Introduced | 1997 |
| Predecessor | Intel 82371FB |
| Successor | Intel ICH |
Intel 82371EB The Intel 82371EB is a southbridge chipset component introduced by Intel during the late 1990s as part of the PIIX4 family for x86 personal computer platforms. It provided peripheral I/O, mass-storage, and legacy bus bridging services for microprocessor platforms built around Intel chipsets and enabled integration with diverse motherboard vendors and OEMs. Its role in bridging the PCI bus to IDE, USB, DMA, and programmable interrupt logic made it central to platforms deployed in enterprise, consumer, and embedded systems.
The 82371EB served as the southbridge companion to northbridge components in platform architectures supporting processors from Intel and competitors. It implemented controller logic for IDE, USB host controller functionality, Direct Memory Access (DMA) arbitration, and Programmable Interrupt Controller (PIC) services. System designers used the 82371EB in reference platforms aligned to specification documents distributed to motherboard makers and OEMs including Compaq, Dell, Hewlett-Packard, and IBM during the era of Pentium II and early Pentium III deployments.
Architecturally, the 82371EB connected to the system through the southbound interconnect specified by platform architecture teams and interfaced with northbridge devices handling Front-side bus transactions and memory arbitration. It contained a suite of controllers implemented as state machines and microcoded finite controllers to manage peripheral buses and legacy support. The component included logic for bus mastering coordination used by PCI expansion cards, programmable timers compatible with existing software standards, and power-management hooks referenced in specification work from organizations such as the Advanced Configuration and Power Interface groups and platform design teams at Intel.
The IDE controller in the 82371EB supported standard ATA and ATAPI devices used by major storage vendors like Seagate Technology, Western Digital, and Toshiba, providing PIO and DMA modes consistent with operating system drivers used by Microsoft and Linux distributions of the period. Its USB host controller implemented the Universal Serial Bus specification adopted by consortia that included Microsoft, Intel, and other industry partners, enabling peripherals from companies such as Logitech and Microsoft Hardware. The DMA engine provided bus-mastering transfer capabilities used by multimedia and networking controllers from 3Com, Realtek, and Broadcom, while the integrated interrupt controller presented interrupt routing compatible with interrupt handling conventions in Windows NT and UNIX-like kernels from projects like NetBSD and FreeBSD.
The 82371EB featured integrated dual-channel IDE interfaces, an OHCI-compliant or UHCI-compliant USB host controller depending on implementation choices by system vendors, and support for multiple DMA channels with arbitration designed for concurrent device access. Clocking and timing constraints were coordinated with northbridge clock generators produced by vendors such as ICS and IDT, supporting system bus frequencies used by Pentium II and Pentium III platforms. Performance characteristics included sustained DMA throughput determined by PCI bus limitations, interrupt latency influenced by chipset firmware and BIOS implementations from firms like AMI and Phoenix Technologies, and overall I/O responsiveness that shaped user experience in desktop and mobile systems marketed by Acer and Gateway.
Motherboard manufacturers integrated the 82371EB into reference designs that paired it with northbridge chips tailored for specific processors from Intel and chipset partners. Board vendors such as ASUS, Gigabyte Technology, and MSI incorporated the 82371EB into desktop and server boards, while system integrators at Sun Microsystems and Hewlett-Packard used it in workstation-class machines. BIOS and firmware teams at Phoenix Technologies and AMI supplied initialization code and resource assignment tables conforming to legacy Plug and Play conventions maintained by consortiums including PCI-SIG. OEMs often customized southbridge feature sets and I/O pin mappings to meet product differentiation goals.
The 82371EB remained relevant across multiple operating system generations until newer southbridge families superseded it. Its legacy support for ISA-style interrupt semantics and IDE interfaces provided backward compatibility with software stacks from Microsoft Windows 95, Windows 98, and server releases like Windows NT 4.0. Successor architectures from Intel, including the Intel ICH series, consolidated USB, SATA, and enhanced power management features while declining reliance on legacy buses. The 82371EB’s design influenced later southbridge integration trends adopted by platform vendors and standards bodies, and its deployment history intersects with major OEM transitions in the late 1990s and early 2000s such as shifts driven by AMD competition and evolving standards from the USB Implementers Forum.
Category:Intel chipsets