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| Aries (interconnect) | |
|---|---|
| Name | Aries (interconnect) |
| Developer | Cray Inc.; later HPE |
| Introduced | 2012 |
| Type | Network interconnect |
| Architecture | Dragonfly topology; optical and electrical links |
| Used in | Cray XC series; HPE Cray EX |
Aries (interconnect) is a high-performance network interconnect developed for supercomputing systems, originally by Cray Inc. and later integrated into Hewlett Packard Enterprise acquisitions. Aries targets low-latency, high-bandwidth communication for large-scale systems such as the Cray XC30, Cray XC40, and HPE Cray EX platforms, and it supports workloads deployed on systems at centers like Oak Ridge National Laboratory, Lawrence Livermore National Laboratory, and Argonne National Laboratory.
Aries implements a packet-switched interconnect with a focus on low latency and scalable bandwidth for tightly coupled parallel applications used at National Energy Research Scientific Computing Center, European Centre for Medium-Range Weather Forecasts, and Tokyo Institute of Technology. Designed to meet the needs of projects like Summit (supercomputer), Sierra (supercomputer), and earlier Titan (supercomputer), Aries provides features that address routing needs encountered in deployments at Los Alamos National Laboratory, Sandia National Laboratories, and research collaborations with organizations such as Intel Corporation, NVIDIA Corporation, and IBM. The interconnect combines hardware routing, congestion management, and system-level integration for deployments involving vendors like Dell Technologies and Fujitsu Limited.
Aries uses a router ASIC implementing a dragonfly-style topology influenced by academic designs used in systems evaluated by Lawrence Berkeley National Laboratory and theoretical work from researchers at University of California, Berkeley and Massachusetts Institute of Technology. The ASIC provides multiple high-speed links supporting optical transceivers from suppliers such as Finisar, Avago Technologies, and Molex. Aries routers integrate with nodes using link technologies compatible with processors from Intel Xeon, AMD EPYC, and accelerator pairings with NVIDIA Tesla and Intel Xeon Phi in systems installed at centers including National Center for Supercomputing Applications and Pawsey Supercomputing Centre. On-chip features include adaptive routing and virtual channel support used in studies by Oak Ridge National Laboratory and Argonne National Laboratory. The topology and cabling strategies echo interconnect approaches seen in Blue Gene/Q and contrast with fat-tree fabrics used by Mellanox Technologies switches.
Aries targets scalable performance demonstrated in benchmarks such as High Performance Linpack runs on systems at Top500 sites and in collective operations measured by OSU Micro-Benchmarks. Reported latencies and bandwidths were key for applications from projects like Weather Research and Forecasting model and Lattice QCD simulations executed at Fermi National Accelerator Laboratory and CERN. Scalability analysis from deployments at Argonne National Laboratory and Oak Ridge National Laboratory showed Aries supporting thousands of compute nodes while employing congestion-control mechanisms similar to those described in research by Sandia National Laboratories and algorithm evaluations from Los Alamos National Laboratory. The interconnect’s performance influenced procurement decisions at institutions including NASA Ames Research Center and European Organisation for Nuclear Research.
Aries integrates with software stacks including Message Passing Interface implementations such as Open MPI and vendor-supported MPI variants used at NERSC and by projects funded by U.S. Department of Energy. It supports low-level communication libraries and features exploited by application teams from Argonne National Laboratory, LLNL, and Oak Ridge National Laboratory to optimize codes like GROMACS, LAMMPS, and NAMD. Aries exposes capabilities through system firmware and drivers maintained by vendors partnered with Hewlett Packard Enterprise and third-party tools from companies like Bright Computing and SGI. Performance tuning and topology-aware placement practices draw on research from University of Illinois Urbana-Champaign and tools developed at Princeton University and University of Texas at Austin.
Aries was deployed in production at national labs including Oak Ridge National Laboratory (for systems in support of projects funded by DOE Office of Science), Lawrence Livermore National Laboratory for simulation workloads, and Argonne National Laboratory for multi-physics codes. Scientific domains leveraging Aries include climate modeling used by Met Office, astrophysics simulations undertaken by European Southern Observatory collaborators, and materials-science computations from teams at Max Planck Society. Commercial and academic centers such as Leibniz Supercomputing Centre and Barcelona Supercomputing Center have evaluated Aries-based systems for workloads spanning computational chemistry, seismic processing used by companies like Schlumberger, and machine-learning research with frameworks such as TensorFlow adapted by groups at Stanford University.
Aries originated during product development at Cray Inc. as part of a roadmap including predecessors and contemporaries from vendors such as Cray Research and follow-on technologies aligned with acquisitions by Hewlett Packard Enterprise and market shifts tracked by Top500. Subsequent roadmap items and research collaborations involved institutions like Sandia National Laboratories, Oak Ridge National Laboratory, and vendors including Intel Corporation and NVIDIA Corporation exploring next-generation interconnect concepts related to optical switching and integration with coherent accelerator fabrics. Future directions discussed in community forums involving PRACE and procurement planning at centers like Jülich Research Centre emphasize convergence with fabrics used in exascale-class systems and interoperability with standards advocated by organizations such as OpenFabrics Alliance and ROCm ecosystems.
Category:Supercomputer interconnects