ARM926EJ-S
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| ARM926EJ-S | |
|---|---|
| Name | ARM926EJ-S |
| Designer | ARM Holdings |
| Introduced | 2001 |
| Architecture | ARMv5TEJ |
| Clock | up to 200 MHz (typical implementations vary) |
| L1 cache | configurable |
| L2 cache | optional |
| Fab | various |
ARM926EJ-S The ARM926EJ-S is a 32-bit microprocessor core developed by ARM Holdings that implements the ARM architecture family variant ARMv5TEJ. It targets embedded systems and integrates features for both applications and real-time tasks, balancing power, performance, and silicon area for licensees such as semiconductor companies, original equipment manufacturers, and systems integrators. The core has seen adoption across consumer electronics, networking equipment, and industrial devices, coexisting with other designs from ARM like the ARM7TDMI and ARM11 series.
Overview
The core was introduced by ARM Holdings to extend the lineage of reduced instruction set computing successes including connections to the Acorn Computers heritage embodied by earlier ARM cores. As a synthesizable core, it was licensed by companies including Texas Instruments, NXP Semiconductors, Samsung Electronics, Broadcom, and Marvell Technology Group for integration in system-on-chip designs alongside controllers from suppliers such as Synopsys and Cadence Design Systems. The ARM926EJ-S supports the embedded Java profile extension, making it relevant to middleware and virtual machine vendors such as Sun Microsystems, BEA Systems, and mobile platform vendors active in the 2000s.
Architecture and Features
The microarchitecture is a five-stage, pipeline design derived from the ARM9 family and compatible with the ARMv5TEJ architecture used in designs contemporary to the Intel XScale era. Key elements include a Harvard cache architecture with configurable unified or separate instruction and data caches, support for the Memory Management Unit (MMU) and the Memory Protection Unit (MPU) used by operating systems like Linux (kernel) and uClinux, and provisions for tightly-coupled memories for deterministic real-time workloads. The core implements the Jazelle DBX/Jazelle extension for Java acceleration, and the core's coprocessor interface allowed integration with floating-point and signal processing units from vendors such as ARM Ltd. and third parties. Interrupt handling and exception models align with software stacks from Wind River Systems, Green Hills Software, and embedded RTOS providers.
Instruction Set and Extensions
The ARM926EJ-S supports the ARMv5TEJ instruction set which combines the main 32-bit ARM instruction set with the 16-bit Thumb subset and the DSP-enhancing ARM DSP Extensions (the "T" and "E" features). The "J" denotes the Jazelle extension intended to accelerate Java bytecode execution as promoted by companies like Sun Microsystems and runtime implementers such as BEA Systems and IBM. Support for coprocessor instructions enabled integration with VFP-style floating-point implementations or custom accelerators from firms like Analog Devices and Texas Instruments. The architecture exposes system control registers used by kernel projects such as NetBSD, FreeBSD, and OpenBSD for MMU configuration and cache management.
Performance and Implementations
Performance characteristics depended on synthesis, process node, and system integration decisions by licensees including Samsung Electronics, NXP Semiconductors, Texas Instruments, Broadcom, and Marvell Technology Group. Typical clocking ranged into the low hundreds of megahertz when fabricated in nodes common in the early-to-mid 2000s; throughput and cycle counts for common workloads were evaluated by industry analysts and vendors like ARM Holdings, EEMBC, and independent benchmarking groups. The core was incorporated into SoCs for products from consumer electronics companies such as Sony Corporation, LG Electronics, and Panasonic Corporation, and used in networking products from Cisco Systems and modem solutions by suppliers like Qualcomm (in earlier partnerships). Implementations often paired the core with peripherals from STMicroelectronics and DMA/IP blocks from ARM Ltd. partners.
Development Tools and Ecosystem
A mature toolchain and ecosystem grew around the core including commercial tool vendors like ARM Ltd. (RealView tools), GNU Project toolchains (GCC, GDB), and commercial IDEs from IAR Systems and Keil (Arm). Debugging and trace were supported by standards and vendors such as JTAG, IEEE 1149.1, and third-party debuggers from Lauterbach. Board and reference designs from companies like BeagleBoard-related communities and evaluation modules from Texas Instruments and NXP Semiconductors aided developers using operating systems including Embedded Linux, QNX, and commercial RTOS offerings from Wind River Systems and Green Hills Software.
Use Cases and Applications
The ARM926EJ-S found use in embedded consumer devices (set-top boxes from Roku-era partners, portable media players from Creative Technology, and early smartphones from manufacturers like HTC), networking equipment from Cisco Systems and D-Link Corporation, and industrial controllers by vendors such as Siemens automation divisions. It powered SoCs for digital home electronics, Human Machine Interfaces (HMIs) in automotive infotainment projects by suppliers like Continental AG and Robert Bosch GmbH, and secure modules where integration with cryptographic engines from Infineon Technologies and NXP Semiconductors was required. Its combination of MMU support, Jazelle compatibility, and broad vendor licensing made it a versatile choice across embedded markets.