ARC (computing)

ARC (computing)
Name	ARC
Type	Processor architecture
Designer	Synopsys
Introduced	1990s
Bits	configurable (16/32/64)
Design	RISC
Endianness	configurable
Website	Synopsys ARC

ARC (computing) is a family of configurable instruction set architectures and microprocessor cores developed by Synopsys for embedded systems, configurable digital signal processing, and low-power devices. The architecture has evolved through collaborations and acquisitions involving companies such as Acorn Computers, Digital Research, ARM Holdings, and Synopsys while being used in products from ViXS, Qualcomm, and Texas Instruments across markets influenced by Intel, AMD, and IBM. ARC has been employed in contexts adjacent to standards and organizations including IEEE, IETF, ISO, IEC, and JEDEC.

Overview

ARC emerged as a configurable RISC architecture in the context of late 20th century microprocessor development alongside families like MIPS, SPARC, and PowerPC, and competed in ecosystems associated with Intel x86, ARM, and RISC-V. Key commercial trajectories involved companies such as Acorn, National Semiconductor, and Synopsys, and touched platforms and projects connected to Commodore, Atari, and Silicon Graphics. The technology has been integrated into consumer electronics from Samsung, Sony, and Panasonic and adopted in designs influenced by standards work at ETSI, Bluetooth SIG, and USB-IF.

Architecture and Instruction Set

The ARC architecture provides a highly configurable instruction set with options for register counts, data widths, and specialized instructions for signal processing, similar in design philosophy to approaches by ARM, MIPS, and RISC-V while also paralleling features seen in DSP cores from Texas Instruments and Analog Devices. ISA elements include general-purpose registers, configurable endianness, and optional multiply–accumulate and SIMD-like extensions used in applications comparable to those for Qualcomm Hexagon and NVIDIA Tegra. The instruction encoding and pipeline designs reflect influences from academic research at MIT, Stanford, and UC Berkeley and practical implementations in microcontrollers like those from Microchip and NXP. Support for exceptions, interrupts, and memory management units permits deployment in systems interoperating with operating systems and hypervisors such as Linux, FreeBSD, VxWorks, and Xen.

Implementations and Variants

Synopsys has produced multiple ARC core families and configurable IP products, analogous to the product lines of ARM Cortex, MIPS Warrior, and RISC-V core providers, with implementations tailored for low-power IoT endpoints, multimedia codecs, and networking accelerators found in routers by Cisco and Juniper. Variants have been licensed and embedded by semiconductor vendors including Marvell, MediaTek, and Broadcom and used in SoC designs alongside components from NVIDIA, Intel, and AMD. Custom silicon projects in academic and industry labs at Caltech, ETH Zurich, and University of Cambridge have explored ARC derivatives in FPGA prototypes similar to work with Xilinx, Altera, and Lattice devices.

Development Tools and Software Ecosystem

Toolchain support for ARC includes compilers, debuggers, and IDEs akin to GCC, LLVM, GDB, and proprietary suites offered by Synopsys and partners, comparable to tooling for ARM Keil, IAR, and Renesas. Real-time operating system ports and middleware connect ARC cores to projects such as Linux kernel subsystems, Zephyr RTOS, FreeRTOS, and QNX Neutrino, while development workflows integrate with build systems and CI services popularized by GitHub, GitLab, and Bitbucket. Ecosystem partnerships involve ecosystem players like Red Hat, Canonical, Microsoft, and Oracle for software stacks and involve verification and simulation tools from Cadence and Mentor Graphics in collaboration with standards bodies like IEEE and ISO.

Applications and Use Cases

ARC cores have been deployed in embedded applications including digital audio and video codecs used by Dolby Laboratories and MPEG consortia, wireless communications stacks for 3GPP and Wi‑Fi, and storage controllers in consumer SSDs and enterprise arrays by Seagate and Western Digital. Additional uses span automotive subsystems in designs by Bosch, Continental, and Tesla, industrial automation products from Siemens and ABB, and medical devices regulated under standards from FDA and CE frameworks. Consumer electronics examples include set-top boxes, smart TVs by LG and Samsung, and wearable devices drawing on sensor fusion work seen in projects by Fitbit and Garmin.

Performance, Security, and Comparison with Other ISAs

Performance of ARC implementations depends on configuration choices—pipeline depth, cache sizes, and DSP extensions—yielding comparisons with ARM Cortex-M, MIPS32, and RISC-V RV32IM cores in benchmarks and thermodynamic profiles studied in research at CMU and INRIA. Security features such as hardware-assisted isolation, memory protection units, and cryptographic accelerators support threat models analyzed by NIST and OWASP and are comparable to mechanisms in ARM TrustZone and Intel SGX in scope for embedded contexts. Trade-offs between configurability, power efficiency, and ecosystem availability place ARC among options evaluated by OEMs and ODMs when selecting cores alongside vendors like ARM, SiFive, and Imagination Technologies.

Category:Microprocessor architectures