Generated by GPT-5-mini| APV25 | |
|---|---|
| Name | APV25 |
| Type | Analog Pipeline Voltage chip |
| Designer | CERN; Paul Scherrer Institute |
| Introduced | 1997 |
| Process | 0.25 μm CMOS |
| Package | 128-pin PGA |
| Application | Silicon strip detectors, readout electronics |
APV25 The APV25 is a radiation-tolerant analog pipeline readout integrated circuit used for silicon microstrip detector front-end instrumentation. It interfaces with particle physics experiments, high-energy detector systems, and electronics designed at CERN, with deployment in projects associated with European Organization for Nuclear Research, Large Hadron Collider, and collaborations such as CMS and ATLAS. The chip’s design intersects technologies developed at Paul Scherrer Institute and groups at institutions like University of California, Berkeley, Brookhaven National Laboratory, and Fermilab.
The APV25 was developed to meet requirements from experiments including Compact Muon Solenoid and experiments at Stanford Linear Accelerator Center and integrates low-noise preamplification, shaping, and a deep analog pipeline compatible with trigger latencies in Large Hadron Collider detectors. It is documented in papers from IEEE conferences and was validated by teams from University of Oxford, Imperial College London, and Università di Pisa. The device enabled readout chains linking hybrid modules, front-end hybrids, and back-end data acquisition systems used by collaborations such as ALICE and LHCb.
The APV25 architecture features a charge-sensitive amplifier, CR-RC shaping stage, 192-cell analog pipeline, and multiplexer controlled by a serial interface; design work referenced methodologies from Bell Labs and microelectronics groups at Massachusetts Institute of Technology. Layout and floorplanning exploited a 0.25 μm CMOS process constrained by radiation-hardening-by-design practices developed alongside projects at Institut National de Physique Nucléaire et de Physique des Particules and CEA Saclay. The chip integrates on-chip biasing, calibration injection, and temperature monitoring used in systems tested at CERN SPS and integrated into modules built by institutes like INFN, University of Manchester, and Korea Advanced Institute of Science and Technology.
APV25 supports multi-peak and deconvolution modes for pulse shaping to accommodate bunch-crossing structures at Large Hadron Collider and trigger schemes similar to those in Tevatron experiments; performance figures were benchmarked against noise targets from groups at Hamburg University and University of Wisconsin–Madison. Typical specifications include input capacitance tolerance matching strip sensors used in CMS Tracker modules, peaking times compatible with timing from CERN LHCb detector subsystems, and dynamic range aligned with radiation-damaged sensor behavior studied at Paul Scherrer Institute. Timing and throughput were validated with firmware and readout boards developed at DESY and National Institute for Nuclear Physics (Italy).
Radiation tolerance was achieved through layout techniques and enclosed geometry transistors influenced by work from TRIUMF and irradiation campaigns at facilities including CERN PS, Los Alamos National Laboratory, and Sandia National Laboratories. Qualification studies addressed total ionizing dose effects and single-event-upset rates monitored by teams from University of Illinois Urbana–Champaign and Columbia University. Reliability in high-fluence environments was demonstrated in campaigns coordinated with European Space Agency testing protocols and cross-checked against standards from International Electrotechnical Commission laboratories.
The APV25 was deployed in thousands of silicon strip modules for trackers in experiments such as CMS, in prototypes for ALICE inner tracking systems, and in beam test setups at facilities like CERN SPS, Fermilab Test Beam Facility, and DESY II. Beyond collider detectors it informed designs for medical imaging projects collaborated on by Karolinska Institute and industrial partners including STMicroelectronics spin-offs. System integration involved collaborations with institutes such as CEA, University of Pennsylvania, and Kyoto University.
Initial design began in the late 1990s at CERN and associated laboratories, with first silicon fabricated in 0.25 μm CMOS and iterative revisions produced by consortia including INFN and CNRS. Subsequent variants and derivative chips incorporated lessons from irradiation tests at CERN PS and performance feedback from CMS Tracker commissioning teams, and influenced successor front-end chips developed in collaborations with University of Michigan and Rutherford Appleton Laboratory.
Qualification procedures for APV25 included noise, linearity, and timing tests in laboratory setups run by groups at Imperial College London, irradiation campaigns at TRIUMF and Paul Scherrer Institute, and system-level integration tests at test beams hosted by CERN and Fermilab. Test matrices followed practices from IEEE Nuclear Science Symposium working groups and certification processes used by European Organization for Nuclear Research detector projects. Firmware and DAQ validation used frameworks developed by collaborators at National Institute for Subatomic Physics and software tools from CERN Openlab.
CMS Tracker, Large Hadron Collider, Silicon microstrip detector, Paul Scherrer Institute, CERN SPS, DESY, Fermilab, INFN, ALICE, ATLAS, LHCb, TRIUMF, Brookhaven National Laboratory, Rutherford Appleton Laboratory, Imperial College London, University of Oxford, IEEE Nuclear Science Symposium, CNRS, CEA Saclay, STMicroelectronics, European Space Agency