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| ALTRO chip | |
|---|---|
| Name | ALTRO chip |
| Designer | CERN |
| Manufacturer | Infineon Technologies |
| Introduced | 2000s |
| Process | 0.35 μm CMOS |
| Nodes | 16 |
| Power | 150 mW/channel |
| Package | 160-pin PGA |
ALTRO chip
The ALTRO chip is a custom analog-to-digital front-end integrated circuit developed for high-rate particle detector readout at CERN. Designed in the early 2000s to serve Time Projection Chamber systems in experiments such as ALICE (A Large Ion Collider Experiment), it interfaces between preamplifiers and digital data acquisition systems used in facilities like Large Hadron Collider and laboratories including DESY and GSI Helmholtz Centre for Heavy Ion Research. The chip was produced through collaborations involving microelectronics groups from institutions such as IKP (Institut für Kernphysik) and companies like Infineon Technologies.
The ALTRO chip provided multichannel analog-to-digital conversion and on-chip digital signal processing for detector readout in experiments including ALICE (A Large Ion Collider Experiment), NA61/SHINE, and prototype systems at CERN SPS. It combined functions commonly distributed across modules designed by teams at CERN and universities such as University of Birmingham, University of Heidelberg, University of Frankfurt am Main, and University of Bergen to meet requirements set by collaborations like ALICE Collaboration and supported infrastructure projects at European Organization for Nuclear Research. The chip's integration enabled compact front-end electronics suited to installations in experimental caverns near LHCb and ATLAS detector areas.
ALTRO employed a mixed-signal design implemented in a 0.35 μm CMOS process from foundries used by research consortia including Infineon Technologies and fabrication partners associated with Europractice. The architecture featured multiple channels with charge-sensitive preamplifier interfaces originally designed to match input from ALICE TPC pad planes, followed by a 10-bit successive approximation or pipeline ADC per channel and digital blocks for baseline correction, zero suppression, and data formatting compatible with optical links to back-end systems like the DATE (Data Acquisition and Test Environment) framework. Clocking and synchronization were designed to integrate with timing systems such as LHC Clock and trigger distribution used in ALICE Trigger and Central Trigger Processor deployments.
The chip delivered sampling rates up to tens of MHz with input dynamic range tailored to the ionization signals observed in Time Projection Chamber detectors. On-chip digital signal processing included baseline restoration, tail cancellation filters, and peak finding to reduce data volume before transmission to DAQ nodes running middleware like ALICE Online System and CASTOR archival interfaces. Radiation tolerance considerations were addressed to withstand environments characterized by fluences studied at facilities such as CERN PS and CERN SPS, with engineering validation tests performed according to protocols used by collaborations including RD48 and RD53.
Development of ALTRO involved interdisciplinary teams from institutes such as CERN, Università di Torino, Université de Strasbourg, Politecnico di Milano, and industrial partners. Project milestones aligned with timelines of experimental construction at CERN and funding cycles coordinated with agencies like European Commission programs and national research councils including Deutsche Forschungsgemeinschaft and National Science Foundation. Prototyping, tapeouts, and qualification runs used design tools from vendors such as Cadence Design Systems and Synopsys, with production batches manufactured by partners related to European microelectronics consortia and distributed to laboratories and universities participating in the ALICE Collaboration.
ALTRO was primarily used in the ALICE TPC readout chain in the ALICE (A Large Ion Collider Experiment), where it digitized signals from pad rows and interfaced to the front-end cards and readout control systems shared across subdetectors like TRD (Transition Radiation Detector), TOF (Time-Of-Flight) subsystems, and commissioning setups at CERN PS. Prototypes and derivative designs found application in test beams at facilities such as CERN SPS, DESY Test Beam Facility, and heavy-ion campaigns at GSI Helmholtz Centre for Heavy Ion Research, supporting physics programs pursued by collaborations including ALICE Collaboration and NA61/SHINE.
Routine calibration procedures for ALTRO-based systems relied on pulser calibration runs, pedestal subtraction, and gain-matching workflows developed by groups at CERN and participating universities such as University of Heidelberg and University of Oslo. Integration with slow control and run control frameworks like DIM and PVSS enabled monitoring, configuration, and error logging during data taking in campaigns coordinated with shift crews from collaborations including ALICE Collaboration. Calibration constants were managed in databases used by reconstruction software stacks like AliRoot and later FairRoot for offline analysis.
The ALTRO chip influenced subsequent front-end ASIC developments for experiments at CERN, DESY, and GSI Helmholtz Centre for Heavy Ion Research, informing requirements for chips such as those from RD53 Collaboration and inspiring mixed-signal integration approaches adopted by projects across institutions including CERN and European Space Agency spin-offs. Its role in enabling high-channel-density readout in ALICE contributed to physics results published by collaborations in journals and conferences like Quark Matter and reinforced cooperative models of electronics development among universities and national laboratories such as INFN, CNRS, and STFC.
Category:Integrated circuits