AArch64

AArch64
Logo-rework as vector-graphic: Smartcom5Idea: Arm, Ltd., 2011 for ARMv8 · CC BY-SA 3.0 · source
Name	AArch64
Developer	ARM Holdings
Architecture	ARMv8-A
Introduced	2011
Design	64-bit RISC
Extensions	NEON, SVE
Successors	ARMv9

AArch64 is the 64-bit execution state introduced by ARM Holdings as part of the ARMv8-A architecture family to provide a modern 64-bit reduced instruction set computing architecture for processors used in servers, desktops, laptops, mobile devices, and embedded systems. It extended the 32-bit ARM architecture with a larger register file, wider address space, and enhancements for performance and security while remaining compatible at the source level with existing ARM software ecosystems. Major vendors and projects including Apple Inc., Qualcomm, Samsung Electronics, NVIDIA, Amazon.com (Graviton), Ampere Computing, Microsoft, Google, IBM, and Fujitsu adopted AArch64 across multiple product lines and cloud offerings.

Overview

AArch64 was defined during the ARMv8 development by ARM Holdings engineers and announced in 2011; it was motivated by needs identified by companies such as Intel Corporation, Advanced Micro Devices, Broadcom, MediaTek, Texas Instruments, Marvell Technology Group, Huawei Technologies, and Xilinx for 64-bit addressing and performance. The profile influenced server and mobile strategies of Amazon Web Services, Microsoft Azure, Google Cloud Platform, and cloud providers like Oracle Corporation and Alibaba Group. Academic and research institutions including MIT, Stanford University, University of Cambridge, ETH Zurich, UC Berkeley, and Carnegie Mellon University explored AArch64 in systems research, while standards and alliances such as The Linux Foundation, Linaro, EEMBC, JEDEC, and OpenCompute Project supported ecosystem development.

Architecture

AArch64 specifies a 64-bit general-purpose register file, program status registers, and a new exception model that vendors like ARM Holdings, Apple Inc., NVIDIA, Ampere Computing, and Marvell Technology Group implement in microarchitectures. The architecture supports a 64-bit virtual address space used by operating systems such as Linux kernel, FreeBSD, NetBSD, OpenBSD, Windows 10, and macOS (on Apple silicon). It includes SIMD and floating-point capabilities via the Advanced SIMD architecture standardized with contributions from groups like IEEE, while industry consortia such as SPEC and SUSE benchmark and certify implementations. Microarchitectural implementations range from in-order cores in embedded products by STMicroelectronics to out-of-order superscalar cores in server CPUs by Qualcomm Centriq, Ampere Altra, Apple M1, Fujitsu A64FX, and Cavium (OCTEON) designs.

Instruction Set and Encoding

The AArch64 instruction set provides fixed-length 32-bit encodings distinct from the 16/32-bit encodings of earlier ARM and Thumb states, enabling dense representation of arithmetic, logical, load/store, branch, and system instructions. Designers at ARM Holdings coordinated with compiler and toolchain teams at GNU Project, LLVM Project, Red Hat, SUSE, Canonical (company), and Microsoft Research to define encodings that facilitate register-rich calling conventions adopted by operating systems like Linux kernel and language runtimes such as Python (programming language), Java (programming language), Rust (programming language), Go (programming language), and Node.js. Extended instruction sets and proposals such as Scalable Vector Extension (SVE) were developed with input from supercomputing centers like Oak Ridge National Laboratory, Lawrence Livermore National Laboratory, Riken, and vendors including Fujitsu and NVIDIA targeting HPC workloads exemplified by projects like TOP500 and Exascale Computing Project.

System-level Features

AArch64 specifies exception levels, virtualization extensions, memory management units, and security states that vendors integrate with platform firmware from projects like UEFI and bootloaders such as U-Boot. Virtualization support aligns with hypervisors like KVM, Xen Project, and proprietary solutions from VMware, Inc. to provide multi-tenant cloud services for providers including Amazon Web Services, Microsoft Azure, and Google Cloud Platform. Security features such as Privileged Access Never analogues, TrustZone extensions, and Pointer Authentication (PAC) were influenced by research from institutions like SRI International and GCHQ and implemented by vendors like Apple Inc. and Qualcomm to mitigate exploitation techniques analyzed in conferences like USENIX Security Symposium, Black Hat USA, RSA Conference, and DEF CON.

Implementation and Use

Commercial implementations of AArch64 appear in server products by Amazon.com (Graviton series), Ampere Computing (Altra), Huawei (Kunpeng), and Fujitsu (A64FX), consumer SoCs by Apple Inc. (M-series), Samsung Electronics (Exynos), Qualcomm (Snapdragon), and embedded microcontrollers by NXP Semiconductors and STMicroelectronics. High-performance computing deployments include Fugaku (Japan) which used AArch64-derived designs, while cloud-native adoption spans Kubernetes clusters, container platforms like Docker (software), and orchestration by Red Hat OpenShift. Standards bodies like ISO and IEEE intersect with AArch64 adoption through floating-point and IEEE-754 compliance testing in scientific computing environments at CERN and NASA.

Software and Toolchain Support

Compilers, assemblers, linkers, and debuggers support AArch64 through projects such as GNU Project (GCC), LLVM Project (Clang), GDB, Binutils, and runtime systems maintained by Red Hat, Debian Project, Ubuntu, SUSE, Fedora Project, and Arch Linux. Operating systems with production AArch64 ports include Linux kernel, FreeBSD, OpenBSD, NetBSD, Windows 10, and macOS (Apple silicon), with container ecosystems from Docker (software) and orchestration by Kubernetes facilitating deployment on cloud platforms like Amazon Web Services, Google Cloud Platform, and Microsoft Azure. Language ecosystems such as Python (programming language), Java (programming language), Node.js, Go (programming language), Rust (programming language), and Ruby (programming language) provide runtime ports and optimizations for AArch64, while package maintainers at Debian Project, Ubuntu, Fedora Project, and Arch Linux curate distributions for server and desktop use.

Performance and Security Considerations

Performance tuning for AArch64 involves microarchitectural features implemented by vendors such as Apple Inc., Qualcomm, NVIDIA, Fujitsu, and Ampere Computing and leverages vector extensions (NEON, SVE) for workloads in scientific computing, machine learning, and multimedia processed by libraries from Intel Math Kernel Library alternatives and open projects like OpenBLAS and FFTW. Security mitigations address speculative execution and side-channel vulnerabilities studied by teams at Google Project Zero, Microsoft Research, AMD Research, and universities including MIT and University of Cambridge, prompting mitigations in firmware, microcode, and operating systems coordinated through vendors like ARM Holdings and cloud providers such as Amazon Web Services. Benchmarking and verification use suites and organizations like SPEC, EEMBC, MLPerf, NIST, and academic consortia to evaluate performance, power efficiency, and security posture across server, mobile, and embedded deployments.

Category:ARM architecture