Tera Systems

Tera Systems. It was a pioneering American supercomputer company founded in 1997 by renowned computer architects Burton Smith and James Rottsolk. The company was established to commercialize the revolutionary Multithreaded Architecture (MTA) developed from earlier research at the University of Washington and the Teradata Corporation. Its primary product, the MTA-2, was designed to solve the "memory wall" problem and simplify parallel programming, aiming to make Petascale computing more accessible. The company operated until 2008, when its key assets were acquired by Cray Inc., marking the end of its independent operations but ensuring the integration of its innovative concepts into future high-performance systems.

History

The company's technological roots trace back to the 1980s with the Denelcor HEP project led by Burton Smith, which first explored hardware multithreading. Following the closure of Denelcor, the research continued through a collaboration between the University of Washington's Center for Parallel Computing and the Teradata Corporation, leading to the prototype known as the "Tera" machine. In 1997, Smith and James Rottsolk spun this technology out to form the commercial entity, securing venture capital funding to develop a marketable product. A significant early partnership was established with the United States Department of Defense and its research agency, DARPA, which provided crucial funding and testbed installations, including a system at the United States Naval Research Laboratory. Despite the technical promise, the company faced significant commercial challenges in a market dominated by established players like IBM, Hewlett-Packard, and Sun Microsystems. After a decade of operation and the delivery of only a handful of systems to select research sites like the San Diego Supercomputer Center, the company ceased operations in 2008, with Cray Inc. purchasing its intellectual property and key personnel.

Architecture

The core innovation was the Multithreaded Architecture, a radical departure from conventional SMP or MPP designs. Its flagship MTA-2 system featured a globally shared, flat UMA address space across all processors, eliminating the need for complex cache coherency protocols and the distinction between local and remote memory prevalent in clusters. Each processor utilized fine-grained hardware multithreading, capable of switching between hundreds of threads on every clock cycle to hide latency from DRAM accesses. The processor design was a custom VLIW engine, and the system used a proprietary interconnect based on a Hypercube topology to link processors and memory modules. This architecture was explicitly designed to simplify parallel programming models, making applications written for OpenMP or C with compiler directives inherently scalable without the explicit message-passing required by MPI.

Software

The software environment was built around a custom Unix-like operating system, a derivative of BSD Unix, optimized for the unique hardware. The primary compiler suite was a heavily modified version of the GNU Compiler Collection (GCC), which included proprietary extensions and directives to support the massive multithreading and global address space. Key programming models supported were OpenMP and a set of custom APIs for explicit parallelization, which allowed programmers to ignore data placement. The system also provided a port of the POSIX-compliant Parallel Virtual Machine (PVM) library and limited support for MPI, though its architecture was philosophically opposed to explicit message passing. Development and debugging tools, such as the TotalView debugger, were adapted to handle the unprecedented number of simultaneous threads per processor.

Applications

The systems were deployed in several government and academic research institutions for challenging, irregular problems that strained conventional supercomputers. At the San Diego Supercomputer Center, researchers used it for complex graph analytics and data mining tasks, such as analyzing large-scale social networks and genomic sequences. The United States Naval Research Laboratory applied it to computational fluid dynamics simulations for aerospace design and cryptographic code-breaking algorithms. Other notable applications included molecular dynamics simulations, where the fine-grained parallelism excelled at modeling particle interactions, and certain classes of Monte Carlo simulations in Computational finance. Its ability to handle unpredictable memory access patterns made it particularly suited for pioneering work in unstructured mesh computations.

Impact and legacy

Although not a commercial success, the company's work had a profound influence on High-performance computing research and industrial design. Its central tenet of using multithreading to tolerate latency became a foundational principle in subsequent architectures, notably seen in GPUs from Nvidia and AMD and in modern many-core processors like Intel's Xeon Phi. The concept of a global address space directly inspired the development of the Partitioned global address space (PGAS) programming models, such as UPC and Coarray Fortran, and influenced the design of the Cray Cascade system. Key personnel, including Burton Smith, joined Microsoft to work on its Azure cloud infrastructure and future computing paradigms. The company's bold attempt to redefine supercomputer architecture remains a celebrated case study in Computer architecture textbooks and a testament to innovative, latency-tolerant design.

Category:Supercomputer companies Category:Defunct computer companies of the United States Category:Companies based in Seattle Category:1997 establishments in Washington (state) Category:2008 disestablishments in Washington (state)