Platform Controller Hub

Platform Controller Hub. It is a single-chip integrated circuit that consolidates the functions traditionally handled by the southbridge and other platform components in a personal computer. Introduced by Intel in 2008 alongside the Nehalem microarchitecture, it represents a fundamental shift in motherboard design by moving key I/O and control functions onto the same package or die as the central processing unit. This architectural change was a key enabler for the evolution of the CPU into a more integrated system on a chip (SoC) design, improving performance and power efficiency.

Overview

The introduction of this component marked the end of the long-standing Intel Hub Architecture, which utilized a two-chipset design comprising a northbridge and a southbridge. By integrating the memory controller and PCI Express controller directly into the CPU, the need for a northbridge was eliminated. Consequently, this single chip assumed all remaining platform responsibilities, including managing storage interfaces like SATA, legacy support for PCI and USB, and system firmware through the Unified Extensible Firmware Interface. This consolidation simplified motherboard layouts and reduced communication latency between the processor and I/O subsystems, a critical advancement for modern computing platforms from desktop computers to data center servers.

Architecture and Function

Architecturally, it serves as the central I/O hub for the platform, connected to the CPU via a high-speed interconnect called the Direct Media Interface. Its core functions include providing multiple SATA ports for hard disk drives and solid-state drives, hosting USB controllers for peripheral connectivity, and integrating Ethernet MAC for network interfaces. It also manages audio functions through the High Definition Audio specification, system clock generation, and power management coordination for the chipset. Furthermore, it contains the Trusted Platform Module for security and interfaces with the SPI flash memory that holds the UEFI firmware, making it essential for system initialization and configuration.

Historical Development

The development was driven by Intel's Tick-Tock model and the transition to the Nehalem microarchitecture. The first generation, codenamed Ibex Peak, was launched in 2008 with the Lynnfield and Clarkdale processors, replacing the ICH10 southbridge. Subsequent generations have been paired with major CPU families, such as Cougar Point with Sandy Bridge, Panther Point with Ivy Bridge, and Sunrise Point with Skylake. Each iteration, developed alongside advancements from the Israel Development Center and other Intel facilities, added support for newer standards like USB 3.0, PCI Express 3.0, and integrated Wi-Fi/Bluetooth capabilities, reflecting the ongoing integration of platform features.

Integration and Examples

Integration has become increasingly tight, with later designs moving the chip from a separate component on the motherboard to being housed within the same physical package as the CPU die, a design evident in platforms like Kaby Lake. Specific examples include the Z97 Express chipset for Haswell processors and the Z370 chipset for Coffee Lake. In the server domain, the Lewisburg PCH works with the Xeon Scalable platform. This integration paradigm has been widely adopted by other semiconductor firms; for instance, AMD's equivalent is the Fusion Controller Hub, used in its Accelerated Processing Unit designs, while Apple employs similar highly integrated controllers in its Apple silicon M1 chips for Macintosh computers.

Comparison with Previous Architectures

Compared to the preceding Intel Hub Architecture, the new design offers significant advantages. In the older design, the northbridge handled communication between the CPU, RAM, and PCI Express, creating a bottleneck. By moving the memory and primary PCI Express controllers into the CPU, latency was drastically reduced, boosting the performance of graphics processing units and double data rate memory. The consolidation into a single chip also reduced motherboard complexity, cost, and power consumption. This stands in contrast to the earlier VIA Technologies Apollo chipsets or NVIDIA's nForce platform, which utilized discrete multi-chip designs, and paved the way for the ultra-compact form factors seen in modern ultrabooks and Intel NUC devices.

Category:Intel chipsets Category:Computer hardware Category:Motherboard