Generated by DeepSeek V3.2| HIP (software) | |
|---|---|
| Name | HIP |
| Developer | Advanced Micro Devices |
| Released | 0 2016 |
| Programming language | C++, C |
| Operating system | Linux, Microsoft Windows |
| Platform | x86-64, AMD64 |
| Genre | Runtime system, Application programming interface |
| License | MIT License |
HIP (software). HIP, which stands for Heterogeneous-Compute Interface for Portability, is a C++ runtime API and kernel language developed by Advanced Micro Devices (AMD) to enable developers to write portable code for GPUs. It provides a low-level, thin abstraction layer over AMD ROCm and NVIDIA CUDA platforms, allowing a single source code to target hardware from both major vendors. The primary goal is to simplify the development of high-performance computing applications by reducing the need for platform-specific codebases, thereby enhancing productivity and accelerating deployment across diverse heterogeneous computing environments.
HIP serves as a bridge between the proprietary NVIDIA CUDA ecosystem and the open AMD ROCm stack, translating CUDA code into portable C++ that can be compiled for either platform. The core design philosophy emphasizes minimal performance overhead, often achieving performance parity with native CUDA on NVIDIA hardware and optimized execution on AMD Instinct and Radeon accelerators. It is a foundational component of AMD's strategy to compete in the datacenter and supercomputing markets, exemplified by its use in Frontier, the Oak Ridge National Laboratory system that became the world's fastest in 2022. The toolkit includes a source-to-source compiler called `hipify-perl` (and later `hipify-clang`) that automates much of the conversion process from existing CUDA projects.
Key features of HIP include a CUDA-like syntax and memory model, making it familiar to developers experienced with NVIDIA's platform. It supports essential GPU programming concepts such as kernels, device functions, shared memory, and asynchronous execution. The runtime provides APIs for memory management (e.g., `hipMalloc`, `hipMemcpy`), stream and event handling, and device querying. A significant feature is its interoperability with leading high-performance computing libraries; for instance, it integrates with rocBLAS and rocFFT on AMD systems and can leverage cuBLAS and cuFFT when running on NVIDIA GPUs. Furthermore, HIP includes profiling support through tools like ROCprofiler and is compatible with debuggers such as ROCgdb.
The architecture of HIP is deliberately thin, consisting of a header file library (`hip_runtime.h`) and a runtime library (`libhiprtc`). At compile time, the `hipcc` compiler driver determines the target platform (AMD ROCm or NVIDIA CUDA) and invokes the appropriate underlying toolchain—either Clang/LLVM for AMD GPUs or NVCC for NVIDIA GPUs. This abstraction layer maps HIP API calls directly to their CUDA or ROCm equivalents, minimizing overhead. The memory hierarchy (global, shared, local) and execution model (grids, blocks, threads) mirror those of CUDA, ensuring conceptual portability. For CPU-GPU synchronization, HIP utilizes mechanisms like `hipDeviceSynchronize` and supports Unified Memory models on compatible hardware.
HIP was first introduced by Advanced Micro Devices in 2016 as part of its broader ROCm initiative to create an open software ecosystem for its GPUs. Early development focused on creating a conversion tool (`hipify-perl`) to help migrate existing CUDA codebases, with significant contributions from partners like Oak Ridge National Laboratory and Lawrence Livermore National Laboratory. A major milestone was the release of `hipify-clang`, a more robust Clang-based translator, which improved support for complex C++ templates and macros. The adoption of HIP by the Exascale Computing Project in the United States and its use in pre-exascale systems like Summit and Sierra underscored its strategic importance. Ongoing development is closely tied to the ROCm release cycle, with enhancements for new hardware like the AMD CDNA architecture.
HIP is extensively used in scientific computing and machine learning frameworks that require cross-vendor GPU support. Notable applications include the Molecule Builder suite for computational chemistry and various computational fluid dynamics codes ported under the Exascale Computing Project. In artificial intelligence, frameworks like TensorFlow and PyTorch can leverage HIP through backend integrations for training models on AMD hardware. The CP2K software for atomistic simulations and the GROMACS molecular dynamics package have also been ported to use HIP, enabling them to run on supercomputers like LUMI in Finland. Its use in commercial rendering and video encoding software is growing, particularly in datacenter deployments.
HIP supports a range of operating systems, primarily Linux distributions such as Ubuntu, RHEL, and SLES, with limited support for Microsoft Windows. On the hardware side, it is compatible with AMD GPUs based on the Graphics Core Next (GCN) architecture and later, including Radeon Instinct and Radeon Pro series, as well as NVIDIA GPUs from the Kepler generation onward. The software stack requires either the AMD ROCm platform (version 3.5 or newer is commonly targeted) or the NVIDIA CUDA Toolkit (version 9.0+). Compiler support includes Clang (for AMD) and NVCC (for NVIDIA), with ongoing work to expand to other accelerator architectures through initiatives like the OpenMP target offload model.
Category:Advanced Micro Devices Category:Application programming interfaces Category:Parallel computing Category:Supercomputer software