Fast Page Mode DRAM

Fast Page Mode DRAM
Name	Fast Page Mode DRAM
Type	Dynamic random-access memory
Inventor	Intel, IBM, Toshiba
Generation	Pre-Synchronous DRAM
Related	Page mode DRAM, Extended Data Out DRAM

Fast Page Mode DRAM. It was a dominant form of dynamic random-access memory in personal computers during the late 1980s and early 1990s, representing a significant performance evolution from standard Page mode DRAM. The architecture allowed for faster access to data within the same memory "page" or row of the DRAM array, reducing latency for sequential reads. Its widespread adoption in systems like those based on the Intel 80386 and Intel 80486 microprocessors was crucial before the industry transitioned to technologies like Extended Data Out DRAM and Synchronous DRAM.

Overview

Fast Page Mode DRAM emerged as an optimization over earlier Page mode DRAM designs, capitalizing on the physical organization of the memory cell matrix. The fundamental innovation was maintaining an open row address to permit rapid column access within that row without the need to repeatedly re-specify the row address. This technique was heavily leveraged by central processing unit cache controllers and direct memory access operations in contemporary systems. Manufacturers such as Micron Technology, Samsung Electronics, and NEC Corporation produced vast quantities of these chips, which were commonly installed on SIMM modules.

Technical Operation

The operational principle relied on the RAS signal being held active while toggling the CAS signal for successive column addresses within the same row. After the initial row access latency, subsequent column accesses within that page incurred a significantly shorter CAS latency. The memory controller, often part of a chipset like those from Intel or VIA Technologies, managed this paging protocol. Critical timing parameters were defined by the JEDEC standards body, ensuring compatibility across the industry. The internal sense amplifier circuitry played a key role in latching the open row's data, enabling the faster column cycles.

Performance Characteristics

Typical access times for Fast Page Mode DRAM ranged from 60 to 80 nanoseconds for the initial random access, with page-mode cycle times as low as 25 nanoseconds. This provided a substantial throughput improvement for linear code execution and data block transfers common in operating systems like MS-DOS and Microsoft Windows 3.1. Performance was highly dependent on the locality of memory references, benefiting applications with sequential access patterns. However, performance degraded sharply on a page miss, requiring a full precharge and new row activation cycle. Benchmarks from periodicals like PC Magazine and Byte (magazine) frequently highlighted these characteristics.

Historical Context and Development

The technology became commercially prominent around 1987, coinciding with the rise of the Intel 80386 architecture which could effectively utilize larger, faster memory systems. It was a key component in high-end workstations from Sun Microsystems and Silicon Graphics, as well as in IBM Personal System/2 models. Development was driven by the need to alleviate the bottleneck between rapidly advancing microprocessors like the Motorola 68030 and main memory bandwidth. The technology represented the peak of asynchronous DRAM design before being supplanted by Extended Data Out DRAM in the mid-1990s, a transition accelerated by the introduction of the Intel Pentium.

Comparison with Other DRAM Types

Compared to its predecessor, Page mode DRAM, it offered reduced control signal overhead and tighter cycle times. The subsequent Extended Data Out DRAM improved upon it by allowing data output to be held valid even after the CAS signal deasserted, enabling pipelining. Burst EDO DRAM added further enhancements for Pentium-class buses. In contrast, Synchronous DRAM, as standardized by JEDEC, fundamentally changed the interface by locking operations to the system clock, rendering asynchronous modes obsolete. Video RAM, used in graphics adapters from companies like ATI Technologies and NVIDIA, employed a dual-port architecture unsuitable for main memory but shared the page-mode concept for efficient screen refreshes.

Applications and Usage

Its primary application was as the main system memory in personal computers throughout the late 1980s and early 1990s. It was integral to platforms including the Amiga 3000, many Macintosh II models, and 80486-based clones. The memory was also used in various embedded systems, printers, and early network server hardware. The advent of Microsoft Windows 95 and resource-intensive software began to expose its limitations, hastening the shift to Synchronous DRAM for new designs. Legacy industrial control systems and retro computing enthusiasts continue to utilize and preserve systems equipped with this technology.

Category:Computer memory Category:DRAM Category:Computer hardware