Airmont (microarchitecture)

Airmont (microarchitecture). Airmont is a 14 nanometer microarchitecture designed by Intel for its low-power Atom, Pentium, and Celeron SoC products. Introduced in 2014 as a straightforward process shrink of the preceding Silvermont core, it served as a transitional design to bring the Atom line to the more advanced 14 nanometer manufacturing node. The architecture was implemented in products such as the Braswell platform for entry-level desktops and the Cherry Trail platform for tablets and 2-in-1 devices.

Overview

The Airmont microarchitecture was formally launched by Intel in early 2015 as part of its strategy to extend the Tick-Tock model to its low-power product lines. It represented the "tick" phase—a process shrink—following the Silvermont "tock" which introduced a new core design. The primary goal for Airmont was to migrate the existing Silvermont design from the 22 nanometer process to the newer, more efficient 14 nanometer FinFET process developed by Intel. This transition was crucial for improving power efficiency and thermal characteristics, which are paramount for the mobile and embedded markets targeted by the Atom brand. Key product families utilizing Airmont cores include the Braswell platform for low-cost desktops and mini PCs, and the Cherry Trail platform for Windows and Android tablets.

Features

Airmont cores retained the fundamental architectural features of Silvermont but realized benefits from the new manufacturing process. The shift to the 14 nanometer FinFET process provided significant reductions in power consumption and TDP, alongside a potential for higher clock speeds within the same power envelope. The microarchitecture continued to support the Intel 64 instruction set and included technologies like VT-x for virtualization. Integrated graphics capabilities were updated, with Cherry Trail platforms incorporating the Intel HD Graphics (Gen8-LP) GPU, offering improved performance for video playback and casual gaming. The SoC designs also integrated advanced features such as LPDDR3 memory controllers and support for USB 3.0 and SATA interfaces, enhancing connectivity for end-user devices.

Processor list

Processors based on the Airmont microarchitecture were marketed under the Atom x5 and Atom x7 series, as well as the Pentium (N35xx/J37xx) and Celeron (N30xx/J3xxx) brands for the Braswell platform. Notable Cherry Trail SoCs include the Atom x5-Z8300, Atom x5-Z8500, and Atom x7-Z8700, which were used in devices from manufacturers like Microsoft (Surface 3), ASUS, and Lenovo. The Braswell lineup featured chips such as the Pentium N3700 and Celeron N3050, commonly found in budget desktops, all-in-one PCs, and NAS appliances. These processors typically featured between two and four cores and were configured with TDPs ranging from 4 watts for tablets to 10 watts for fanless desktop systems.

Successor and predecessor

Airmont was directly preceded by the Silvermont microarchitecture, which debuted on the 22 nanometer process and provided a major architectural overhaul for the Atom line. The successor to Airmont is the Goldmont microarchitecture, which represented the next "tock" with an updated core design while remaining on the 14 nanometer process. Goldmont introduced improvements in IPC, enhanced security features, and was used in subsequent platforms like Apollo Lake and Denverton. The progression from Silvermont to Airmont to Goldmont illustrated Intel's iterative approach to evolving its low-power processor lineup for markets ranging from IoT to entry-level client computing.

Architecture details

At the transistor level, the Airmont design leveraged Intel's second-generation 14 nanometer FinFET technology, which offered better performance and lower leakage compared to the first-generation process used for Broadwell cores. The core layout itself was a direct port from Silvermont, maintaining the same out-of-order execution capabilities for the integer pipeline and in-order execution for the FPU. The CPU cache hierarchy typically consisted of a 64 KB L1 cache (32 KB instruction, 24 KB data) per core and a shared 1 MB or 2 MB L2 cache across the core cluster. The integrated memory controller supported both DDR3L and LPDDR3 standards, and the platform incorporated an updated DMI interface for chipset communication. These architectural constants, combined with the process advantages, allowed Airmont-based SoCs to deliver competitive performance-per-watt for their era in the highly contested mobile computing and value PC segments.

Category:Intel microarchitectures Category:2014 in computing