Generated by DeepSeek V3.2| ARMv9-A | |
|---|---|
| Name | ARMv9-A |
| Designer | Arm Holdings |
| Bits | 64-bit |
| Introduced | 2021 |
| Type | Load–store architecture |
| Encoding | Fixed (32-bit), variable (A64) |
| Branching | Condition code, compare and branch |
| Endianness | Bi (Little-endian as default) |
| Page size | 4 KB, 16 KB, 64 KB |
| Extensions | SVE2, TME, MTE, Realm Management Extension |
| Predecessor | ARMv8-A |
ARMv9-A. It is the latest generation of the Arm architecture for application profiles, formally introduced by Arm Holdings in 2021. This architecture builds upon the foundation of ARMv8-A while introducing significant new capabilities focused on artificial intelligence, digital signal processing, and enhanced security. The design represents a long-term roadmap for Arm-based computing across diverse markets, including client computing, infrastructure, and the automotive industry.
The development of this architecture was driven by the need to address emerging computational challenges beyond the capabilities of its predecessor. Key figures at Arm Holdings, including lead architects and Simon Segars, the former CEO, emphasized its role in enabling the next decade of compute. The first public details were unveiled at the Arm Vision Day event, signaling a major evolution for the Arm ecosystem. Its design principles aim to deliver a platform for pervasive AI and unmatched security, ensuring compatibility with the vast software base established under ARMv8-A.
A cornerstone of the new architecture is the mandatory integration of Scalable Vector Extensions (SVE2), which succeeds the initial SVE introduced for Fujitsu's Fugaku (supercomputer). SVE2 enhances performance for machine learning and multimedia workloads across a wider range of applications. Another major feature is the Transactional Memory Extension (TME), providing hardware support for transactional memory to simplify parallel programming. The architecture also includes enhancements to the memory model and system registers to better support heterogeneous computing and big.LITTLE configurations common in system on a chip designs from partners like Qualcomm, Samsung Electronics, and MediaTek.
Security is a fundamental pillar, introducing the concept of Confidential Compute Architecture (CCA). A key component is the Realm Management Extension (RME), which creates isolated execution environments called Realms, protected even from the privileged hypervisor or operating system. This is complemented by Memory Tagging Extension (MTE), designed to help detect and prevent memory safety vulnerabilities, a common attack vector. These features, developed in response to threats analyzed by groups like Google Project Zero, aim to provide a robust foundation for trusted execution environment across platforms from mobile devices to cloud servers.
Beyond new extensions, the architecture includes numerous microarchitectural enhancements for higher performance. These include refinements to branch prediction, deeper out-of-order execution pipelines, and advanced data prefetching algorithms. The combination of SVE2 and TME targets significant speedups in data center workloads, 5G infrastructure, and advanced driver-assistance systems. These improvements are designed to be leveraged by Arm partners in custom CPU cores, such as those from Apple Inc. with their Apple silicon or Amazon Web Services with their Graviton instances.
The first CPU cores to implement this architecture were the Arm Cortex-A710, Arm Cortex-A510, and the Arm Cortex-X2, announced as part of the Armv9 roadmap for 2022. Major technology firms have committed to its adoption; Google announced support for its security features in the Android (operating system), and Microsoft is integrating support into Windows 11 and its Azure cloud platform. Early silicon implementations have appeared in SoCs like the MediaTek Dimensity 9000 and are expected in future products from NVIDIA, following its announced acquisition plans of Arm Holdings. The architecture is poised to power next-generation devices and infrastructure, shaping the future of edge computing and high-performance computing.